6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-09 10:31:14 +00:00
Code Issues Projects Releases Wiki Activity

Do not emit bit tests if target does not support natively left shift

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71240 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-05-08 18:51:34 +00:00
parent da4d2f63d8
commit d34167a4ab
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
View File

@ -1923,6 +1923,10 @@ bool SelectionDAGLowering::handleBitTestsSwitchCase(CaseRec& CR,
// inserting any additional MBBs necessary to represent the switch. // inserting any additional MBBs necessary to represent the switch.
MachineFunction *CurMF = CurMBB->getParent(); MachineFunction *CurMF = CurMBB->getParent();
// If target does not have legal shift left, do not emit bit tests at all.
if (!TLI.isOperationLegal(ISD::SHL, TLI.getPointerTy()))
return false;
size_t numCmps = 0; size_t numCmps = 0;
for (CaseItr I = CR.Range.first, E = CR.Range.second; for (CaseItr I = CR.Range.first, E = CR.Range.second;
I!=E; ++I) { I!=E; ++I) {