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Misc style fixes. NFC.

Browse Source 
This fixes a few cases of:

* Wrong variable name style.
* Lines longer than 80 columns.
* Repeated names in comments.
* clang-format of the above.

This make the next patch a lot easier to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221615 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
2014-11-10 18:11:10 +00:00
parent 2d268749a5
commit d342c4c748
11 changed files with 274 additions and 352 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
View File

@ -200,26 +200,26 @@ static MCDisassembler *createAArch64Disassembler(const Target &T,
} }
DecodeStatus AArch64Disassembler::getInstruction(MCInst &MI, uint64_t &Size, DecodeStatus AArch64Disassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region, const MemoryObject &Region,
uint64_t Address, uint64_t Address,
raw_ostream &os, raw_ostream &OS,
raw_ostream &cs) const { raw_ostream &CS) const {
CommentStream = &cs; CommentStream = &CS;
uint8_t bytes[4]; uint8_t Bytes[4];
Size = 0; Size = 0;
// We want to read exactly 4 bytes of data. // We want to read exactly 4 bytes of data.
if (Region.readBytes(Address, 4, (uint8_t *)bytes) == -1) if (Region.readBytes(Address, 4, Bytes) == -1)
return Fail; return Fail;
Size = 4; Size = 4;
// Encoded as a small-endian 32-bit word in the stream. // Encoded as a small-endian 32-bit word in the stream.
uint32_t insn = uint32_t Insn =
(bytes[3] << 24) | (bytes[2] << 16) | (bytes[1] << 8) | (bytes[0] << 0); (Bytes[3] << 24) | (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0);
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI); return decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
} }
static MCSymbolizer * static MCSymbolizer *

7
lib/Target/AArch64/Disassembler/AArch64Disassembler.h
View File

@ -28,11 +28,10 @@ public:
~AArch64Disassembler() {} ~AArch64Disassembler() {}
/// getInstruction - See MCDisassembler.
MCDisassembler::DecodeStatus MCDisassembler::DecodeStatus
getInstruction(MCInst &instr, uint64_t &size, const MemoryObject &region, getInstruction(MCInst &Instr, uint64_t &Size, const MemoryObject &Segion,
uint64_t address, raw_ostream &vStream, uint64_t Address, raw_ostream &VStream,
raw_ostream &cStream) const override; raw_ostream &CStream) const override;
}; };
} // namespace llvm } // namespace llvm

250
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -85,42 +85,34 @@ namespace {
} }
namespace { namespace {
/// ARMDisassembler - ARM disassembler for all ARM platforms. /// ARM disassembler for all ARM platforms.
class ARMDisassembler : public MCDisassembler { class ARMDisassembler : public MCDisassembler {
public: public:
/// Constructor - Initializes the disassembler.
///
ARMDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : ARMDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx) { MCDisassembler(STI, Ctx) {
} }
~ARMDisassembler() { ~ARMDisassembler() {}
}
/// getInstruction - See MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, const MemoryObject &Region, uint64_t Address,
const MemoryObject &region, uint64_t address, raw_ostream &VStream,
raw_ostream &vStream, raw_ostream &CStream) const override;
raw_ostream &cStream) const override;
}; };
/// ThumbDisassembler - Thumb disassembler for all Thumb platforms. /// Thumb disassembler for all Thumb platforms.
class ThumbDisassembler : public MCDisassembler { class ThumbDisassembler : public MCDisassembler {
public: public:
/// Constructor - Initializes the disassembler.
///
ThumbDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : ThumbDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx) { MCDisassembler(STI, Ctx) {
} }
~ThumbDisassembler() { ~ThumbDisassembler() {}
}
/// getInstruction - See MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, const MemoryObject &Region, uint64_t Address,
const MemoryObject &region, uint64_t address, raw_ostream &VStream,
raw_ostream &vStream, raw_ostream &CStream) const override;
raw_ostream &cStream) const override;
private: private:
mutable ITStatus ITBlock; mutable ITStatus ITBlock;
@ -416,102 +408,100 @@ static MCDisassembler *createThumbDisassembler(const Target &T,
DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size, DecodeStatus ARMDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region, const MemoryObject &Region,
uint64_t Address, uint64_t Address, raw_ostream &OS,
raw_ostream &os, raw_ostream &CS) const {
raw_ostream &cs) const { CommentStream = &CS;
CommentStream = &cs;
uint8_t bytes[4]; uint8_t Bytes[4];
assert(!(STI.getFeatureBits() & ARM::ModeThumb) && assert(!(STI.getFeatureBits() & ARM::ModeThumb) &&
"Asked to disassemble an ARM instruction but Subtarget is in Thumb mode!"); "Asked to disassemble an ARM instruction but Subtarget is in Thumb "
"mode!");
// We want to read exactly 4 bytes of data. // We want to read exactly 4 bytes of data.
if (Region.readBytes(Address, 4, bytes) == -1) { if (Region.readBytes(Address, 4, Bytes) == -1) {
Size = 0; Size = 0;
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
// Encoded as a small-endian 32-bit word in the stream. // Encoded as a small-endian 32-bit word in the stream.
uint32_t insn = (bytes[3] << 24) | uint32_t Insn =
(bytes[2] << 16) | (Bytes[3] << 24) | (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0);
(bytes[1] << 8) |
(bytes[0] << 0);
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
DecodeStatus result = decodeInstruction(DecoderTableARM32, MI, insn, DecodeStatus Result =
Address, this, STI); decodeInstruction(DecoderTableARM32, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
// VFP and NEON instructions, similarly, are shared between ARM // VFP and NEON instructions, similarly, are shared between ARM
// and Thumb modes. // and Thumb modes.
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableVFP32, MI, insn, Address, this, STI); Result = decodeInstruction(DecoderTableVFP32, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableVFPV832, MI, insn, Address, this, STI); Result = decodeInstruction(DecoderTableVFPV832, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableNEONData32, MI, insn, Address, Result =
this, STI); decodeInstruction(DecoderTableNEONData32, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
// Add a fake predicate operand, because we share these instruction // Add a fake predicate operand, because we share these instruction
// definitions with Thumb2 where these instructions are predicable. // definitions with Thumb2 where these instructions are predicable.
if (!DecodePredicateOperand(MI, 0xE, Address, this)) if (!DecodePredicateOperand(MI, 0xE, Address, this))
return MCDisassembler::Fail; return MCDisassembler::Fail;
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableNEONLoadStore32, MI, insn, Address, Result = decodeInstruction(DecoderTableNEONLoadStore32, MI, Insn, Address,
this, STI); this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
// Add a fake predicate operand, because we share these instruction // Add a fake predicate operand, because we share these instruction
// definitions with Thumb2 where these instructions are predicable. // definitions with Thumb2 where these instructions are predicable.
if (!DecodePredicateOperand(MI, 0xE, Address, this)) if (!DecodePredicateOperand(MI, 0xE, Address, this))
return MCDisassembler::Fail; return MCDisassembler::Fail;
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableNEONDup32, MI, insn, Address, Result =
this, STI); decodeInstruction(DecoderTableNEONDup32, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
// Add a fake predicate operand, because we share these instruction // Add a fake predicate operand, because we share these instruction
// definitions with Thumb2 where these instructions are predicable. // definitions with Thumb2 where these instructions are predicable.
if (!DecodePredicateOperand(MI, 0xE, Address, this)) if (!DecodePredicateOperand(MI, 0xE, Address, this))
return MCDisassembler::Fail; return MCDisassembler::Fail;
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTablev8NEON32, MI, insn, Address, Result =
this, STI); decodeInstruction(DecoderTablev8NEON32, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTablev8Crypto32, MI, insn, Address, Result =
this, STI); decodeInstruction(DecoderTablev8Crypto32, MI, Insn, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
MI.clear(); MI.clear();
@ -685,53 +675,53 @@ void ThumbDisassembler::UpdateThumbVFPPredicate(MCInst &MI) const {
DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size, DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region, const MemoryObject &Region,
uint64_t Address, uint64_t Address,
raw_ostream &os, raw_ostream &OS,
raw_ostream &cs) const { raw_ostream &CS) const {
CommentStream = &cs; CommentStream = &CS;
uint8_t bytes[4]; uint8_t Bytes[4];
assert((STI.getFeatureBits() & ARM::ModeThumb) && assert((STI.getFeatureBits() & ARM::ModeThumb) &&
"Asked to disassemble in Thumb mode but Subtarget is in ARM mode!"); "Asked to disassemble in Thumb mode but Subtarget is in ARM mode!");
// We want to read exactly 2 bytes of data. // We want to read exactly 2 bytes of data.
if (Region.readBytes(Address, 2, bytes) == -1) { if (Region.readBytes(Address, 2, Bytes) == -1) {
Size = 0; Size = 0;
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
uint16_t insn16 = (bytes[1] << 8) | bytes[0]; uint16_t Insn16 = (Bytes[1] << 8) | Bytes[0];
DecodeStatus result = decodeInstruction(DecoderTableThumb16, MI, insn16, DecodeStatus Result =
Address, this, STI); decodeInstruction(DecoderTableThumb16, MI, Insn16, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 2; Size = 2;
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableThumbSBit16, MI, insn16, Result = decodeInstruction(DecoderTableThumbSBit16, MI, Insn16, Address, this,
Address, this, STI); STI);
if (result) { if (Result) {
Size = 2; Size = 2;
bool InITBlock = ITBlock.instrInITBlock(); bool InITBlock = ITBlock.instrInITBlock();
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
AddThumb1SBit(MI, InITBlock); AddThumb1SBit(MI, InITBlock);
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableThumb216, MI, insn16, Result =
Address, this, STI); decodeInstruction(DecoderTableThumb216, MI, Insn16, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 2; Size = 2;
// Nested IT blocks are UNPREDICTABLE. Must be checked before we add // Nested IT blocks are UNPREDICTABLE. Must be checked before we add
// the Thumb predicate. // the Thumb predicate.
if (MI.getOpcode() == ARM::t2IT && ITBlock.instrInITBlock()) if (MI.getOpcode() == ARM::t2IT && ITBlock.instrInITBlock())
result = MCDisassembler::SoftFail; Result = MCDisassembler::SoftFail;
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
// If we find an IT instruction, we need to parse its condition // If we find an IT instruction, we need to parse its condition
// code and mask operands so that we can apply them correctly // code and mask operands so that we can apply them correctly
@ -743,115 +733,115 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
ITBlock.setITState(Firstcond, Mask); ITBlock.setITState(Firstcond, Mask);
} }
return result; return Result;
} }
// We want to read exactly 4 bytes of data. // We want to read exactly 4 bytes of data.
if (Region.readBytes(Address, 4, bytes) == -1) { if (Region.readBytes(Address, 4, Bytes) == -1) {
Size = 0; Size = 0;
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
uint32_t insn32 = (bytes[3] << 8) | uint32_t Insn32 =
(bytes[2] << 0) | (Bytes[3] << 8) | (Bytes[2] << 0) | (Bytes[1] << 24) | (Bytes[0] << 16);
(bytes[1] << 24) |
(bytes[0] << 16);
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableThumb32, MI, insn32, Address, Result =
this, STI); decodeInstruction(DecoderTableThumb32, MI, Insn32, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
bool InITBlock = ITBlock.instrInITBlock(); bool InITBlock = ITBlock.instrInITBlock();
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
AddThumb1SBit(MI, InITBlock); AddThumb1SBit(MI, InITBlock);
return result; return Result;
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableThumb232, MI, insn32, Address, Result =
this, STI); decodeInstruction(DecoderTableThumb232, MI, Insn32, Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
return result; return Result;
} }
if (fieldFromInstruction(insn32, 28, 4) == 0xE) { if (fieldFromInstruction(Insn32, 28, 4) == 0xE) {
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableVFP32, MI, insn32, Address, this, STI); Result =
if (result != MCDisassembler::Fail) { decodeInstruction(DecoderTableVFP32, MI, Insn32, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
UpdateThumbVFPPredicate(MI); UpdateThumbVFPPredicate(MI);
return result; return Result;
} }
} }
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableVFPV832, MI, insn32, Address, this, STI); Result =
if (result != MCDisassembler::Fail) { decodeInstruction(DecoderTableVFPV832, MI, Insn32, Address, this, STI);
if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
if (fieldFromInstruction(insn32, 28, 4) == 0xE) { if (fieldFromInstruction(Insn32, 28, 4) == 0xE) {
MI.clear(); MI.clear();
result = decodeInstruction(DecoderTableNEONDup32, MI, insn32, Address, Result = decodeInstruction(DecoderTableNEONDup32, MI, Insn32, Address, this,
this, STI); STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
return result; return Result;
} }
} }
if (fieldFromInstruction(insn32, 24, 8) == 0xF9) { if (fieldFromInstruction(Insn32, 24, 8) == 0xF9) {
MI.clear(); MI.clear();
uint32_t NEONLdStInsn = insn32; uint32_t NEONLdStInsn = Insn32;
NEONLdStInsn &= 0xF0FFFFFF; NEONLdStInsn &= 0xF0FFFFFF;
NEONLdStInsn |= 0x04000000; NEONLdStInsn |= 0x04000000;
result = decodeInstruction(DecoderTableNEONLoadStore32, MI, NEONLdStInsn, Result = decodeInstruction(DecoderTableNEONLoadStore32, MI, NEONLdStInsn,
Address, this, STI); Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
return result; return Result;
} }
} }
if (fieldFromInstruction(insn32, 24, 4) == 0xF) { if (fieldFromInstruction(Insn32, 24, 4) == 0xF) {
MI.clear(); MI.clear();
uint32_t NEONDataInsn = insn32; uint32_t NEONDataInsn = Insn32;
NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24 NEONDataInsn &= 0xF0FFFFFF; // Clear bits 27-24
NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24 NEONDataInsn |= (NEONDataInsn & 0x10000000) >> 4; // Move bit 28 to bit 24
NEONDataInsn |= 0x12000000; // Set bits 28 and 25 NEONDataInsn |= 0x12000000; // Set bits 28 and 25
result = decodeInstruction(DecoderTableNEONData32, MI, NEONDataInsn, Result = decodeInstruction(DecoderTableNEONData32, MI, NEONDataInsn,
Address, this, STI); Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
Check(result, AddThumbPredicate(MI)); Check(Result, AddThumbPredicate(MI));
return result; return Result;
} }
MI.clear(); MI.clear();
uint32_t NEONCryptoInsn = insn32; uint32_t NEONCryptoInsn = Insn32;
NEONCryptoInsn &= 0xF0FFFFFF; // Clear bits 27-24 NEONCryptoInsn &= 0xF0FFFFFF; // Clear bits 27-24
NEONCryptoInsn |= (NEONCryptoInsn & 0x10000000) >> 4; // Move bit 28 to bit 24 NEONCryptoInsn |= (NEONCryptoInsn & 0x10000000) >> 4; // Move bit 28 to bit 24
NEONCryptoInsn |= 0x12000000; // Set bits 28 and 25 NEONCryptoInsn |= 0x12000000; // Set bits 28 and 25
result = decodeInstruction(DecoderTablev8Crypto32, MI, NEONCryptoInsn, Result = decodeInstruction(DecoderTablev8Crypto32, MI, NEONCryptoInsn,
Address, this, STI); Address, this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
MI.clear(); MI.clear();
uint32_t NEONv8Insn = insn32; uint32_t NEONv8Insn = Insn32;
NEONv8Insn &= 0xF3FFFFFF; // Clear bits 27-26 NEONv8Insn &= 0xF3FFFFFF; // Clear bits 27-26
result = decodeInstruction(DecoderTablev8NEON32, MI, NEONv8Insn, Address, Result = decodeInstruction(DecoderTablev8NEON32, MI, NEONv8Insn, Address,
this, STI); this, STI);
if (result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return result; return Result;
} }
} }

11
lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
View File

@ -42,9 +42,10 @@ public:
HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx) HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
: MCDisassembler(STI, Ctx) {} : MCDisassembler(STI, Ctx) {}
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
MemoryObject const &region, uint64_t address, MemoryObject const &Region, uint64_t Address,
raw_ostream &vStream, raw_ostream &cStream) const override; raw_ostream &VStream,
raw_ostream &CStream) const override;
}; };
} }
@ -68,9 +69,9 @@ DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
raw_ostream &cs) const { raw_ostream &cs) const {
std::array<uint8_t, 4> Bytes; std::array<uint8_t, 4> Bytes;
Size = 4; Size = 4;
if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) { if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1)
return MCDisassembler::Fail; return MCDisassembler::Fail;
}
uint32_t insn = uint32_t insn =
llvm::support::endian::read<uint32_t, llvm::support::little, llvm::support::endian::read<uint32_t, llvm::support::little,
llvm::support::unaligned>(Bytes.data()); llvm::support::unaligned>(Bytes.data());

131
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
View File

@ -31,15 +31,14 @@ typedef MCDisassembler::DecodeStatus DecodeStatus;
namespace { namespace {
/// MipsDisassemblerBase - a disasembler class for Mips. /// A disasembler class for Mips.
class MipsDisassemblerBase : public MCDisassembler { class MipsDisassemblerBase : public MCDisassembler {
public: public:
/// Constructor - Initializes the disassembler.
///
MipsDisassemblerBase(const MCSubtargetInfo &STI, MCContext &Ctx, MipsDisassemblerBase(const MCSubtargetInfo &STI, MCContext &Ctx,
bool bigEndian) : bool IsBigEndian)
MCDisassembler(STI, Ctx), : MCDisassembler(STI, Ctx),
IsN64(STI.getFeatureBits() & Mips::FeatureN64), isBigEndian(bigEndian) {} IsN64(STI.getFeatureBits() & Mips::FeatureN64),
IsBigEndian(IsBigEndian) {}
virtual ~MipsDisassemblerBase() {} virtual ~MipsDisassemblerBase() {}
@ -48,15 +47,13 @@ public:
private: private:
bool IsN64; bool IsN64;
protected: protected:
bool isBigEndian; bool IsBigEndian;
}; };
/// MipsDisassembler - a disasembler class for Mips32. /// A disasembler class for Mips32.
class MipsDisassembler : public MipsDisassemblerBase { class MipsDisassembler : public MipsDisassemblerBase {
bool IsMicroMips; bool IsMicroMips;
public: public:
/// Constructor - Initializes the disassembler.
///
MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool bigEndian) MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool bigEndian)
: MipsDisassemblerBase(STI, Ctx, bigEndian) { : MipsDisassemblerBase(STI, Ctx, bigEndian) {
IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips; IsMicroMips = STI.getFeatureBits() & Mips::FeatureMicroMips;
@ -75,32 +72,23 @@ public:
return !hasMips32() && !hasMips3(); return !hasMips32() && !hasMips3();
} }
/// getInstruction - See MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, const MemoryObject &Region, uint64_t Address,
uint64_t &size, raw_ostream &VStream,
const MemoryObject &region, raw_ostream &CStream) const override;
uint64_t address,
raw_ostream &vStream,
raw_ostream &cStream) const override;
}; };
/// A disasembler class for Mips64.
/// Mips64Disassembler - a disasembler class for Mips64.
class Mips64Disassembler : public MipsDisassemblerBase { class Mips64Disassembler : public MipsDisassemblerBase {
public: public:
/// Constructor - Initializes the disassembler.
///
Mips64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx, Mips64Disassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
bool bigEndian) : bool bigEndian) :
MipsDisassemblerBase(STI, Ctx, bigEndian) {} MipsDisassemblerBase(STI, Ctx, bigEndian) {}
/// getInstruction - See MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, const MemoryObject &Region, uint64_t Address,
uint64_t &size, raw_ostream &VStream,
const MemoryObject &region, raw_ostream &CStream) const override;
uint64_t address,
raw_ostream &vStream,
raw_ostream &cStream) const override;
}; };
} // end anonymous namespace } // end anonymous namespace
@ -709,43 +697,34 @@ static DecodeStatus DecodeBlezGroupBranch(MCInst &MI, InsnType insn,
return MCDisassembler::Success; return MCDisassembler::Success;
} }
/// readInstruction - read four bytes from the MemoryObject /// Read four bytes from the MemoryObject and return 32 bit word sorted
/// and return 32 bit word sorted according to the given endianess /// according to the given endianess
static DecodeStatus readInstruction32(const MemoryObject &region, static DecodeStatus readInstruction32(const MemoryObject &Region,
uint64_t address, uint64_t Address, uint64_t &Size,
uint64_t &size, uint32_t &Insn, bool IsBigEndian,
uint32_t &insn,
bool isBigEndian,
bool IsMicroMips) { bool IsMicroMips) {
uint8_t Bytes[4]; uint8_t Bytes[4];
// We want to read exactly 4 Bytes of data. // We want to read exactly 4 Bytes of data.
if (region.readBytes(address, 4, Bytes) == -1) { if (Region.readBytes(Address, 4, Bytes) == -1) {
size = 0; Size = 0;
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
if (isBigEndian) { if (IsBigEndian) {
// Encoded as a big-endian 32-bit word in the stream. // Encoded as a big-endian 32-bit word in the stream.
insn = (Bytes[3] << 0) | Insn =
(Bytes[2] << 8) | (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) | (Bytes[0] << 24);
(Bytes[1] << 16) | } else {
(Bytes[0] << 24);
}
else {
// Encoded as a small-endian 32-bit word in the stream. // Encoded as a small-endian 32-bit word in the stream.
// Little-endian byte ordering: // Little-endian byte ordering:
// mips32r2: 4 | 3 | 2 | 1 // mips32r2: 4 | 3 | 2 | 1
// microMIPS: 2 | 1 | 4 | 3 // microMIPS: 2 | 1 | 4 | 3
if (IsMicroMips) { if (IsMicroMips) {
insn = (Bytes[2] << 0) | Insn = (Bytes[2] << 0) | (Bytes[3] << 8) | (Bytes[0] << 16) |
(Bytes[3] << 8) |
(Bytes[0] << 16) |
(Bytes[1] << 24); (Bytes[1] << 24);
} else { } else {
insn = (Bytes[0] << 0) | Insn = (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) |
(Bytes[1] << 8) |
(Bytes[2] << 16) |
(Bytes[3] << 24); (Bytes[3] << 24);
} }
} }
@ -753,24 +732,22 @@ static DecodeStatus readInstruction32(const MemoryObject &region,
return MCDisassembler::Success; return MCDisassembler::Success;
} }
DecodeStatus DecodeStatus MipsDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
MipsDisassembler::getInstruction(MCInst &instr, const MemoryObject &Region,
uint64_t &Size, uint64_t Address,
const MemoryObject &Region, raw_ostream &VStream,
uint64_t Address, raw_ostream &CStream) const {
raw_ostream &vStream,
raw_ostream &cStream) const {
uint32_t Insn; uint32_t Insn;
DecodeStatus Result = readInstruction32(Region, Address, Size, DecodeStatus Result =
Insn, isBigEndian, IsMicroMips); readInstruction32(Region, Address, Size, Insn, IsBigEndian, IsMicroMips);
if (Result == MCDisassembler::Fail) if (Result == MCDisassembler::Fail)
return MCDisassembler::Fail; return MCDisassembler::Fail;
if (IsMicroMips) { if (IsMicroMips) {
DEBUG(dbgs() << "Trying MicroMips32 table (32-bit opcodes):\n"); DEBUG(dbgs() << "Trying MicroMips32 table (32-bit opcodes):\n");
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableMicroMips32, instr, Insn, Address, Result = decodeInstruction(DecoderTableMicroMips32, Instr, Insn, Address,
this, STI); this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
@ -782,7 +759,7 @@ MipsDisassembler::getInstruction(MCInst &instr,
if (hasCOP3()) { if (hasCOP3()) {
DEBUG(dbgs() << "Trying COP3_ table (32-bit opcodes):\n"); DEBUG(dbgs() << "Trying COP3_ table (32-bit opcodes):\n");
Result = Result =
decodeInstruction(DecoderTableCOP3_32, instr, Insn, Address, this, STI); decodeInstruction(DecoderTableCOP3_32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return Result; return Result;
@ -791,7 +768,7 @@ MipsDisassembler::getInstruction(MCInst &instr,
if (hasMips32r6() && isGP64()) { if (hasMips32r6() && isGP64()) {
DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n"); DEBUG(dbgs() << "Trying Mips32r6_64r6 (GPR64) table (32-bit opcodes):\n");
Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, instr, Insn, Result = decodeInstruction(DecoderTableMips32r6_64r6_GP6432, Instr, Insn,
Address, this, STI); Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
@ -801,7 +778,7 @@ MipsDisassembler::getInstruction(MCInst &instr,
if (hasMips32r6()) { if (hasMips32r6()) {
DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n"); DEBUG(dbgs() << "Trying Mips32r6_64r6 table (32-bit opcodes):\n");
Result = decodeInstruction(DecoderTableMips32r6_64r632, instr, Insn, Result = decodeInstruction(DecoderTableMips32r6_64r632, Instr, Insn,
Address, this, STI); Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
@ -811,8 +788,8 @@ MipsDisassembler::getInstruction(MCInst &instr,
DEBUG(dbgs() << "Trying Mips table (32-bit opcodes):\n"); DEBUG(dbgs() << "Trying Mips table (32-bit opcodes):\n");
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address, Result =
this, STI); decodeInstruction(DecoderTableMips32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return Result; return Result;
@ -821,30 +798,28 @@ MipsDisassembler::getInstruction(MCInst &instr,
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
DecodeStatus DecodeStatus Mips64Disassembler::getInstruction(MCInst &Instr, uint64_t &Size,
Mips64Disassembler::getInstruction(MCInst &instr, const MemoryObject &Region,
uint64_t &Size, uint64_t Address,
const MemoryObject &Region, raw_ostream &VStream,
uint64_t Address, raw_ostream &CStream) const {
raw_ostream &vStream,
raw_ostream &cStream) const {
uint32_t Insn; uint32_t Insn;
DecodeStatus Result = readInstruction32(Region, Address, Size, DecodeStatus Result =
Insn, isBigEndian, false); readInstruction32(Region, Address, Size, Insn, IsBigEndian, false);
if (Result == MCDisassembler::Fail) if (Result == MCDisassembler::Fail)
return MCDisassembler::Fail; return MCDisassembler::Fail;
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableMips6432, instr, Insn, Address, Result =
this, STI); decodeInstruction(DecoderTableMips6432, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return Result; return Result;
} }
// If we fail to decode in Mips64 decoder space we can try in Mips32 // If we fail to decode in Mips64 decoder space we can try in Mips32
Result = decodeInstruction(DecoderTableMips32, instr, Insn, Address, Result =
this, STI); decodeInstruction(DecoderTableMips32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;
return Result; return Result;

22
lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
View File

@ -28,11 +28,10 @@ public:
: MCDisassembler(STI, Ctx) {} : MCDisassembler(STI, Ctx) {}
virtual ~PPCDisassembler() {} virtual ~PPCDisassembler() {}
// Override MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, const MemoryObject &Region, uint64_t Address,
const MemoryObject &region, uint64_t address, raw_ostream &VStream,
raw_ostream &vStream, raw_ostream &CStream) const override;
raw_ostream &cStream) const override;
}; };
} // end anonymous namespace } // end anonymous namespace
@ -323,10 +322,9 @@ static DecodeStatus decodeCRBitMOperand(MCInst &Inst, uint64_t Imm,
#include "PPCGenDisassemblerTables.inc" #include "PPCGenDisassemblerTables.inc"
DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size, DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region, const MemoryObject &Region,
uint64_t Address, uint64_t Address, raw_ostream &OS,
raw_ostream &os, raw_ostream &CS) const {
raw_ostream &cs) const {
// Get the four bytes of the instruction. // Get the four bytes of the instruction.
uint8_t Bytes[4]; uint8_t Bytes[4];
Size = 4; Size = 4;
@ -336,10 +334,8 @@ DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
} }
// The instruction is big-endian encoded. // The instruction is big-endian encoded.
uint32_t Inst = (Bytes[0] << 24) | uint32_t Inst =
(Bytes[1] << 16) | (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 8) | (Bytes[3] << 0);
(Bytes[2] << 8) |
(Bytes[3] << 0);
return decodeInstruction(DecoderTable32, MI, Inst, Address, this, STI); return decodeInstruction(DecoderTable32, MI, Inst, Address, this, STI);
} }

57
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
View File

@ -27,23 +27,17 @@ typedef MCDisassembler::DecodeStatus DecodeStatus;
namespace { namespace {
/// SparcDisassembler - a disassembler class for Sparc. /// A disassembler class for Sparc.
class SparcDisassembler : public MCDisassembler { class SparcDisassembler : public MCDisassembler {
public: public:
/// Constructor - Initializes the disassembler. SparcDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
/// : MCDisassembler(STI, Ctx) {}
SparcDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx)
{}
virtual ~SparcDisassembler() {} virtual ~SparcDisassembler() {}
/// getInstruction - See MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, const MemoryObject &Region, uint64_t Address,
uint64_t &size, raw_ostream &VStream,
const MemoryObject &region, raw_ostream &CStream) const override;
uint64_t address,
raw_ostream &vStream,
raw_ostream &cStream) const override;
}; };
} }
@ -213,37 +207,30 @@ static DecodeStatus DecodeSWAP(MCInst &Inst, unsigned insn, uint64_t Address,
#include "SparcGenDisassemblerTables.inc" #include "SparcGenDisassemblerTables.inc"
/// readInstruction - read four bytes from the MemoryObject /// Read four bytes from the MemoryObject and return 32 bit word.
/// and return 32 bit word. static DecodeStatus readInstruction32(const MemoryObject &Region,
static DecodeStatus readInstruction32(const MemoryObject &region, uint64_t Address, uint64_t &Size,
uint64_t address, uint32_t &Insn) {
uint64_t &size,
uint32_t &insn) {
uint8_t Bytes[4]; uint8_t Bytes[4];
// We want to read exactly 4 Bytes of data. // We want to read exactly 4 Bytes of data.
if (region.readBytes(address, 4, Bytes) == -1) { if (Region.readBytes(Address, 4, Bytes) == -1) {
size = 0; Size = 0;
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
// Encoded as a big-endian 32-bit word in the stream. // Encoded as a big-endian 32-bit word in the stream.
insn = (Bytes[3] << 0) | Insn =
(Bytes[2] << 8) | (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) | (Bytes[0] << 24);
(Bytes[1] << 16) |
(Bytes[0] << 24);
return MCDisassembler::Success; return MCDisassembler::Success;
} }
DecodeStatus SparcDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus const MemoryObject &Region,
SparcDisassembler::getInstruction(MCInst &instr, uint64_t Address,
uint64_t &Size, raw_ostream &VStream,
const MemoryObject &Region, raw_ostream &CStream) const {
uint64_t Address,
raw_ostream &vStream,
raw_ostream &cStream) const {
uint32_t Insn; uint32_t Insn;
DecodeStatus Result = readInstruction32(Region, Address, Size, Insn); DecodeStatus Result = readInstruction32(Region, Address, Size, Insn);
@ -252,8 +239,8 @@ SparcDisassembler::getInstruction(MCInst &instr,
// Calling the auto-generated decoder function. // Calling the auto-generated decoder function.
Result = decodeInstruction(DecoderTableSparc32, instr, Insn, Address, Result =
this, STI); decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI);
if (Result != MCDisassembler::Fail) { if (Result != MCDisassembler::Fail) {
Size = 4; Size = 4;

13
lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
View File

@ -28,11 +28,10 @@ public:
: MCDisassembler(STI, Ctx) {} : MCDisassembler(STI, Ctx) {}
virtual ~SystemZDisassembler() {} virtual ~SystemZDisassembler() {}
// Override MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, const MemoryObject &Region, uint64_t Address,
const MemoryObject &region, uint64_t address, raw_ostream &VStream,
raw_ostream &vStream, raw_ostream &CStream) const override;
raw_ostream &cStream) const override;
}; };
} // end anonymous namespace } // end anonymous namespace
@ -290,8 +289,8 @@ static DecodeStatus decodeBDLAddr64Disp12Len8Operand(MCInst &Inst,
DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size, DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
const MemoryObject &Region, const MemoryObject &Region,
uint64_t Address, uint64_t Address,
raw_ostream &os, raw_ostream &OS,
raw_ostream &cs) const { raw_ostream &CS) const {
// Get the first two bytes of the instruction. // Get the first two bytes of the instruction.
uint8_t Bytes[6]; uint8_t Bytes[6];
Size = 0; Size = 0;

60
lib/Target/X86/Disassembler/X86Disassembler.cpp
View File

@ -97,16 +97,15 @@ X86GenericDisassembler::X86GenericDisassembler(
} }
} }
/// regionReader - a callback function that wraps the readByte method from /// A callback function that wraps the readByte method from MemoryObject.
/// MemoryObject.
/// ///
/// @param arg - The generic callback parameter. In this case, this should /// @param Arg - The generic callback parameter. In this case, this should
/// be a pointer to a MemoryObject. /// be a pointer to a MemoryObject.
/// @param byte - A pointer to the byte to be read. /// @param Byte - A pointer to the byte to be read.
/// @param address - The address to be read. /// @param Address - The address to be read.
static int regionReader(const void* arg, uint8_t* byte, uint64_t address) { static int regionReader(const void *Arg, uint8_t *Byte, uint64_t Address) {
const MemoryObject* region = static_cast<const MemoryObject*>(arg); const MemoryObject *Region = static_cast<const MemoryObject *>(Arg);
return region->readByte(address, byte); return Region->readByte(Address, Byte);
} }
/// logger - a callback function that wraps the operator<< method from /// logger - a callback function that wraps the operator<< method from
@ -127,38 +126,27 @@ static void logger(void* arg, const char* log) {
// Public interface for the disassembler // Public interface for the disassembler
// //
MCDisassembler::DecodeStatus MCDisassembler::DecodeStatus X86GenericDisassembler::getInstruction(
X86GenericDisassembler::getInstruction(MCInst &instr, MCInst &Instr, uint64_t &Size, const MemoryObject &Region, uint64_t Address,
uint64_t &size, raw_ostream &VStream, raw_ostream &CStream) const {
const MemoryObject &region, CommentStream = &CStream;
uint64_t address,
raw_ostream &vStream,
raw_ostream &cStream) const {
CommentStream = &cStream;
InternalInstruction internalInstr; InternalInstruction InternalInstr;
dlog_t loggerFn = logger; dlog_t LoggerFn = logger;
if (&vStream == &nulls()) if (&VStream == &nulls())
loggerFn = nullptr; // Disable logging completely if it's going to nulls(). LoggerFn = nullptr; // Disable logging completely if it's going to nulls().
int ret = decodeInstruction(&internalInstr,
regionReader,
(const void*)&region,
loggerFn,
(void*)&vStream,
(const void*)MII.get(),
address,
fMode);
if (ret) { int Ret = decodeInstruction(&InternalInstr, regionReader,
size = internalInstr.readerCursor - address; (const void *)&Region, LoggerFn, (void *)&VStream,
(const void *)MII.get(), Address, fMode);
if (Ret) {
Size = InternalInstr.readerCursor - Address;
return Fail; return Fail;
} } else {
else { Size = InternalInstr.length;
size = internalInstr.length; return (!translateInstruction(Instr, InternalInstr, this)) ? Success : Fail;
return (!translateInstruction(instr, internalInstr, this)) ?
Success : Fail;
} }
} }

10
lib/Target/X86/Disassembler/X86Disassembler.h
View File

@ -87,19 +87,15 @@ class raw_ostream;
namespace X86Disassembler { namespace X86Disassembler {
/// X86GenericDisassembler - Generic disassembler for all X86 platforms. /// Generic disassembler for all X86 platforms. All each platform class should
/// All each platform class should have to do is subclass the constructor, and /// have to do is subclass the constructor, and provide a different
/// provide a different disassemblerMode value. /// disassemblerMode value.
class X86GenericDisassembler : public MCDisassembler { class X86GenericDisassembler : public MCDisassembler {
std::unique_ptr<const MCInstrInfo> MII; std::unique_ptr<const MCInstrInfo> MII;
public: public:
/// Constructor - Initializes the disassembler.
///
X86GenericDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, X86GenericDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
std::unique_ptr<const MCInstrInfo> MII); std::unique_ptr<const MCInstrInfo> MII);
public: public:
/// getInstruction - See MCDisassembler.
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
const MemoryObject &region, uint64_t address, const MemoryObject &region, uint64_t address,
raw_ostream &vStream, raw_ostream &vStream,

45
lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
View File

@ -36,44 +36,39 @@ public:
XCoreDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) : XCoreDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
MCDisassembler(STI, Ctx) {} MCDisassembler(STI, Ctx) {}
/// \brief See MCDisassembler. DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
DecodeStatus getInstruction(MCInst &instr, uint64_t &size, const MemoryObject &Region, uint64_t Address,
const MemoryObject &region, uint64_t address, raw_ostream &VStream,
raw_ostream &vStream, raw_ostream &CStream) const override;
raw_ostream &cStream) const override;
}; };
} }
static bool readInstruction16(const MemoryObject &region, static bool readInstruction16(const MemoryObject &Region, uint64_t Address,
uint64_t address, uint64_t &Size, uint16_t &Insn) {
uint64_t &size,
uint16_t &insn) {
uint8_t Bytes[4]; uint8_t Bytes[4];
// We want to read exactly 2 Bytes of data. // We want to read exactly 2 Bytes of data.
if (region.readBytes(address, 2, Bytes) == -1) { if (Region.readBytes(Address, 2, Bytes) == -1) {
size = 0; Size = 0;
return false; return false;
} }
// Encoded as a little-endian 16-bit word in the stream. // Encoded as a little-endian 16-bit word in the stream.
insn = (Bytes[0] << 0) | (Bytes[1] << 8); Insn = (Bytes[0] << 0) | (Bytes[1] << 8);
return true; return true;
} }
static bool readInstruction32(const MemoryObject &region, static bool readInstruction32(const MemoryObject &Region, uint64_t Address,
uint64_t address, uint64_t &Size, uint32_t &Insn) {
uint64_t &size,
uint32_t &insn) {
uint8_t Bytes[4]; uint8_t Bytes[4];
// We want to read exactly 4 Bytes of data. // We want to read exactly 4 Bytes of data.
if (region.readBytes(address, 4, Bytes) == -1) { if (Region.readBytes(Address, 4, Bytes) == -1) {
size = 0; Size = 0;
return false; return false;
} }
// Encoded as a little-endian 32-bit word in the stream. // Encoded as a little-endian 32-bit word in the stream.
insn = (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) | Insn =
(Bytes[3] << 24); (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) | (Bytes[3] << 24);
return true; return true;
} }
@ -745,13 +740,9 @@ DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
return S; return S;
} }
MCDisassembler::DecodeStatus MCDisassembler::DecodeStatus XCoreDisassembler::getInstruction(
XCoreDisassembler::getInstruction(MCInst &instr, MCInst &instr, uint64_t &Size, const MemoryObject &Region, uint64_t Address,
uint64_t &Size, raw_ostream &vStream, raw_ostream &cStream) const {
const MemoryObject &Region,
uint64_t Address,
raw_ostream &vStream,
raw_ostream &cStream) const {
uint16_t insn16; uint16_t insn16;
if (!readInstruction16(Region, Address, Size, insn16)) { if (!readInstruction16(Region, Address, Size, insn16)) {