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Fix the arm's disassembler for blx that was building an MCInst without the

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needed two predicate operands before the imm operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126662 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kevin Enderby 2011-02-28 18:46:31 +00:00
parent c24ab5c654
commit d436d5b1c9
2 changed files with 16 additions and 1 deletions
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14
lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
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@ -1719,6 +1719,17 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
return true;
}
// Some instructions have predicate operands first before the immediate.
if(Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) {
// Handling the two predicate operands before the imm operand.
if (B->DoPredicateOperands(MI, Opcode, insn, NumOps))
NumOpsAdded += 2;
else {
DEBUG(errs() << "Expected predicate operands not found.\n");
return false;
}
}
// Add the imm operand.
int Offset = 0;
@ -1745,7 +1756,8 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
// to compensate.
MI.addOperand(MCOperand::CreateImm(Offset + 4));
NumOpsAdded = 1;
// This is an increment as some predicate operands may have been added first.
NumOpsAdded += 1;
return true;
}

3
test/MC/Disassembler/ARM/thumb-tests.txt
View File

@ -118,3 +118,6 @@
# CHECK: msr cpsr_fc, r0
0x80 0xf3 0x00 0x89
# CHECK: blx #0
0xff 0xf7 0xfe 0xef