6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-01 12:24:24 +00:00
Code Issues Projects Releases Wiki Activity

Fix stack frame layout in prologue/epilogue. Patch courtesy of Nate Begeman.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15026 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman
2004-07-20 02:23:09 +00:00
parent 913e1b4bdd
commit d43b9fd1ae
1 changed files with 11 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
lib/Target/PowerPC/PowerPCRegisterInfo.cpp
View File

@ -196,10 +196,11 @@ void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
// //
NumBytes += MFI->getMaxCallFrameSize() + NumBytes += MFI->getMaxCallFrameSize() +
24 /* Predefined PowerPC link area */ + 24 /* Predefined PowerPC link area */ +
// FIXME: must calculate #non-volatile int regs actually spilled 32 /* Predefined PowerPC params area */ +
19*4 /* Spilled int regs */ + 0 /* local variables - managed by llvm*/ +
// FIXME: must calculate #non-volatile fp regs actually spilled 0 * 4 /* volatile GPRs used - managed by llvm */ +
0*8 /* Spilled fp regs */; 0 * 8 /* volatile FPRs used - managed by llvm */;
// Round the size to a multiple of the alignment (don't forget the 4 byte // Round the size to a multiple of the alignment (don't forget the 4 byte
// offset though). // offset though).
@ -209,11 +210,7 @@ void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
// Store the incoming LR so it is preserved across calls // Store the incoming LR so it is preserved across calls
MI = BuildMI(PPC32::MFLR, 0, PPC32::R0); MI = BuildMI(PPC32::MFLR, 0, PPC32::R0);
MBB.insert(MBBI, MI); MBB.insert(MBBI, MI);
// FIXME: store only CLOBBERED registers in R[13-31] MI = BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addImm(8).addReg(PPC32::R1);
MI = BuildMI(PPC32::STMW, 3).addReg(PPC32::R13).addSImm(-76)
.addReg(PPC32::R1);
MBB.insert(MBBI, MI);
MI = BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
MBB.insert(MBBI, MI); MBB.insert(MBBI, MI);
} }
@ -238,24 +235,20 @@ void PowerPCRegisterInfo::emitEpilogue(MachineFunction &MF,
// Get the number of bytes allocated from the FrameInfo... // Get the number of bytes allocated from the FrameInfo...
unsigned NumBytes = MFI->getStackSize(); unsigned NumBytes = MFI->getStackSize();
// Adjust stack pointer back
MI = BuildMI(PPC32::LWZ, 2, PPC32::R1).addImm(0).addReg(PPC32::R1);
MBB.insert(MBBI, MI);
// If we have calls, restore the LR value before we branch to it // If we have calls, restore the LR value before we branch to it
// FIXME: the assembly printer inserts "calls" aka branch-and-link to get the // FIXME: the assembly printer inserts "calls" aka branch-and-link to get the
// PC address. We may not know about those calls at this time, so be // PC address. We may not know about those calls at this time, so be
// conservative. // conservative.
if (MFI->hasCalls() || true) { if (MFI->hasCalls() || true) {
// Read old LR from stack into R0 // Restore LR
MI = BuildMI(PPC32::LWZ, 2, PPC32::R0).addSImm(8).addReg(PPC32::R1); MI = BuildMI(PPC32::LWZ, 2, PPC32::R0).addSImm(NumBytes+8).addReg(PPC32::R1);
MBB.insert(MBBI, MI);
// FIXME: restore only SAVED registers in R[13-31]
MI = BuildMI(PPC32::LMW, 2, PPC32::R13).addSImm(-76).addReg(PPC32::R1);
MBB.insert(MBBI, MI); MBB.insert(MBBI, MI);
MI = BuildMI(PPC32::MTLR, 1).addReg(PPC32::R0); MI = BuildMI(PPC32::MTLR, 1).addReg(PPC32::R0);
MBB.insert(MBBI, MI); MBB.insert(MBBI, MI);
} }
// Adjust stack pointer back
MI = BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addImm(NumBytes);
MBB.insert(MBBI, MI);
} }
#include "PowerPCGenRegisterInfo.inc" #include "PowerPCGenRegisterInfo.inc"