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[MachineSink] Use the real post dominator tree

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Summary:
Fixes a FIXME in MachineSinking. Instead of using the simple heuristics
in isPostDominatedBy, use the real MachinePostDominatorTree. The old
heuristics caused instructions to sink unnecessarily, and might create
register pressure.

Test Plan:
Added a NVPTX codegen test to verify that our change is in effect. It also
shows the unnecessary register pressure caused by over-sinking. Updated
affected tests in AArch64 and X86.

Reviewers: eliben, meheff, Jiangning

Reviewed By: Jiangning

Subscribers: jholewinski, aemerson, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D4814



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216862 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jingyue Wu
2014-09-01 03:47:25 +00:00
parent e2cf6dc5c9
commit d43e6df10b
4 changed files with 59 additions and 28 deletions
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30
lib/CodeGen/MachineSink.cpp
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@ -23,6 +23,7 @@
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
@ -48,8 +49,9 @@ namespace {
class MachineSinking : public MachineFunctionPass {
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
MachineRegisterInfo *MRI; // Machine register information
MachineDominatorTree *DT; // Machine dominator tree
MachineRegisterInfo *MRI; // Machine register information
MachineDominatorTree *DT; // Machine dominator tree
MachinePostDominatorTree *PDT; // Machine post dominator tree
MachineLoopInfo *LI;
AliasAnalysis *AA;
@ -74,8 +76,10 @@ namespace {
MachineFunctionPass::getAnalysisUsage(AU);
AU.addRequired<AliasAnalysis>();
AU.addRequired<MachineDominatorTree>();
AU.addRequired<MachinePostDominatorTree>();
AU.addRequired<MachineLoopInfo>();
AU.addPreserved<MachineDominatorTree>();
AU.addPreserved<MachinePostDominatorTree>();
AU.addPreserved<MachineLoopInfo>();
}
@ -236,6 +240,7 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
TRI = TM.getSubtargetImpl()->getRegisterInfo();
MRI = &MF.getRegInfo();
DT = &getAnalysis<MachineDominatorTree>();
PDT = &getAnalysis<MachinePostDominatorTree>();
LI = &getAnalysis<MachineLoopInfo>();
AA = &getAnalysis<AliasAnalysis>();
@ -453,23 +458,6 @@ static void collectDebugValues(MachineInstr *MI,
}
}
/// isPostDominatedBy - Return true if A is post dominated by B.
static bool isPostDominatedBy(MachineBasicBlock *A, MachineBasicBlock *B) {
// FIXME - Use real post dominator.
if (A->succ_size() != 2)
return false;
MachineBasicBlock::succ_iterator I = A->succ_begin();
if (B == *I)
++I;
MachineBasicBlock *OtherSuccBlock = *I;
if (OtherSuccBlock->succ_size() != 1 ||
*(OtherSuccBlock->succ_begin()) != B)
return false;
return true;
}
/// isProfitableToSinkTo - Return true if it is profitable to sink MI.
bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr *MI,
MachineBasicBlock *MBB,
@ -481,8 +469,8 @@ bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr *MI,
return false;
// It is profitable if SuccToSinkTo does not post dominate current block.
if (!isPostDominatedBy(MBB, SuccToSinkTo))
return true;
if (!PDT->dominates(SuccToSinkTo, MBB))
return true;
// Check if only use in post dominated block is PHI instruction.
bool NonPHIUse = false;