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Avoid aborting on invalid shift counts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47612 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1241,13 +1241,19 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
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case ISD::SHL:
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// (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
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if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
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ComputeMaskedBits(Op.getOperand(0), Mask.lshr(SA->getValue()),
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unsigned ShAmt = SA->getValue();
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// If the shift count is an invalid immediate, don't do anything.
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if (ShAmt >= BitWidth)
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return;
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ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
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KnownZero, KnownOne, Depth+1);
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assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
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KnownZero <<= SA->getValue();
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KnownOne <<= SA->getValue();
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KnownZero <<= ShAmt;
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KnownOne <<= ShAmt;
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// low bits known zero.
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KnownZero |= APInt::getLowBitsSet(BitWidth, SA->getValue());
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KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
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}
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return;
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case ISD::SRL:
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@ -1255,6 +1261,10 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
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if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
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unsigned ShAmt = SA->getValue();
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// If the shift count is an invalid immediate, don't do anything.
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if (ShAmt >= BitWidth)
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return;
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ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
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KnownZero, KnownOne, Depth+1);
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assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
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@ -1269,6 +1279,10 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
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if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
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unsigned ShAmt = SA->getValue();
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// If the shift count is an invalid immediate, don't do anything.
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if (ShAmt >= BitWidth)
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return;
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APInt InDemandedMask = (Mask << ShAmt);
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// If any of the demanded bits are produced by the sign extension, we also
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// demand the input sign bit.
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30
test/CodeGen/X86/invalid-shift-immediate.ll
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30
test/CodeGen/X86/invalid-shift-immediate.ll
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@ -0,0 +1,30 @@
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; RUN: llvm-as < %s | llc -march=x86
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; PR2098
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin8"
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define void @foo(i32 %x) {
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entry:
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%x_addr = alloca i32 ; <i32*> [#uses=2]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i32 %x, i32* %x_addr
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%tmp = load i32* %x_addr, align 4 ; <i32> [#uses=1]
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%tmp1 = ashr i32 %tmp, -2 ; <i32> [#uses=1]
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%tmp2 = and i32 %tmp1, 1 ; <i32> [#uses=1]
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%tmp23 = trunc i32 %tmp2 to i8 ; <i8> [#uses=1]
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%toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
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br i1 %toBool, label %bb, label %bb5
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bb: ; preds = %entry
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%tmp4 = call i32 (...)* @bar( ) nounwind ; <i32> [#uses=0]
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br label %bb5
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bb5: ; preds = %bb, %entry
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br label %return
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return: ; preds = %bb5
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ret void
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}
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declare i32 @bar(...)
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