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Add 'implicit EFLAGS' to patterns for popcnt and lzcnt

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141853 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2011-10-13 06:18:52 +00:00
parent f77dea13d7
commit d501c714cd
2 changed files with 23 additions and 12 deletions
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17
lib/Target/X86/X86InstrInfo.td
View File

@ -1347,24 +1347,29 @@ let Predicates = [HasRDRAND], Defs = [EFLAGS] in {
let Predicates = [HasLZCNT], Defs = [EFLAGS] in {
def LZCNT16rr : I<0xBD, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
"lzcnt{w}\t{$src, $dst|$dst, $src}",
[(set GR16:$dst, (ctlz GR16:$src))]>, XS, OpSize;
[(set GR16:$dst, (ctlz GR16:$src)), (implicit EFLAGS)]>, XS,
OpSize;
def LZCNT16rm : I<0xBD, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
"lzcnt{w}\t{$src, $dst|$dst, $src}",
[(set GR16:$dst, (ctlz (loadi16 addr:$src)))]>, XS, OpSize;
[(set GR16:$dst, (ctlz (loadi16 addr:$src))),
(implicit EFLAGS)]>, XS, OpSize;
def LZCNT32rr : I<0xBD, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
"lzcnt{l}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (ctlz GR32:$src))]>, XS;
[(set GR32:$dst, (ctlz GR32:$src)), (implicit EFLAGS)]>, XS;
def LZCNT32rm : I<0xBD, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"lzcnt{l}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (ctlz (loadi32 addr:$src)))]>, XS;
[(set GR32:$dst, (ctlz (loadi32 addr:$src))),
(implicit EFLAGS)]>, XS;
def LZCNT64rr : RI<0xBD, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
"lzcnt{q}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (ctlz GR64:$src))]>, XS;
[(set GR64:$dst, (ctlz GR64:$src)), (implicit EFLAGS)]>,
XS;
def LZCNT64rm : RI<0xBD, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
"lzcnt{q}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (ctlz (loadi64 addr:$src)))]>, XS;
[(set GR64:$dst, (ctlz (loadi64 addr:$src))),
(implicit EFLAGS)]>, XS;
}
//===----------------------------------------------------------------------===//

18
lib/Target/X86/X86InstrSSE.td
View File

@ -5703,24 +5703,30 @@ defm VTESTPDY : avx_bittest<0x0F, "vtestpd", VR256, f256mem, memopv4f64, v4f64>;
let Defs = [EFLAGS], Predicates = [HasPOPCNT] in {
def POPCNT16rr : I<0xB8, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src),
"popcnt{w}\t{$src, $dst|$dst, $src}",
[(set GR16:$dst, (ctpop GR16:$src))]>, OpSize, XS;
[(set GR16:$dst, (ctpop GR16:$src)), (implicit EFLAGS)]>,
OpSize, XS;
def POPCNT16rm : I<0xB8, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
"popcnt{w}\t{$src, $dst|$dst, $src}",
[(set GR16:$dst, (ctpop (loadi16 addr:$src)))]>, OpSize, XS;
[(set GR16:$dst, (ctpop (loadi16 addr:$src))),
(implicit EFLAGS)]>, OpSize, XS;
def POPCNT32rr : I<0xB8, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
"popcnt{l}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (ctpop GR32:$src))]>, XS;
[(set GR32:$dst, (ctpop GR32:$src)), (implicit EFLAGS)]>,
XS;
def POPCNT32rm : I<0xB8, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"popcnt{l}\t{$src, $dst|$dst, $src}",
[(set GR32:$dst, (ctpop (loadi32 addr:$src)))]>, XS;
[(set GR32:$dst, (ctpop (loadi32 addr:$src))),
(implicit EFLAGS)]>, XS;
def POPCNT64rr : RI<0xB8, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
"popcnt{q}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (ctpop GR64:$src))]>, XS;
[(set GR64:$dst, (ctpop GR64:$src)), (implicit EFLAGS)]>,
XS;
def POPCNT64rm : RI<0xB8, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
"popcnt{q}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (ctpop (loadi64 addr:$src)))]>, XS;
[(set GR64:$dst, (ctpop (loadi64 addr:$src))),
(implicit EFLAGS)]>, XS;
}