diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ccef6c3b6cb..e34282bfca7 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -5732,6 +5732,8 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
   case ARM::STR_PRE_REG:
   case ARM::STR_POST_IMM:
   case ARM::STR_POST_REG:
+  case ARM::STRH_PRE:
+  case ARM::STRH_POST:
   case ARM::STRB_PRE_IMM:
   case ARM::STRB_PRE_REG:
   case ARM::STRB_POST_IMM:
diff --git a/test/MC/ARM/diagnostics.s b/test/MC/ARM/diagnostics.s
index 25eb6f227a6..83af10d2091 100644
--- a/test/MC/ARM/diagnostics.s
+++ b/test/MC/ARM/diagnostics.s
@@ -496,6 +496,10 @@ foo2:
         str r0, [r0, r1]!
         str r0, [r0], #4
         str r0, [r0], r1
+        strh r0, [r0, #2]!
+        strh r0, [r0, r1]!
+        strh r0, [r0], #2
+        strh r0, [r0], r1
         strb r0, [r0, #1]!
         strb r0, [r0, r1]!
         strb r0, [r0], #1
@@ -513,6 +517,18 @@ foo2:
 @ CHECK-ERRORS: str r0, [r0], r1
 @ CHECK-ERRORS:         ^
 @ CHECK-ERRORS: error: source register and base register can't be identical
+@ CHECK-ERRORS: strh r0, [r0, #2]!
+@ CHECK-ERRORS:          ^
+@ CHECK-ERRORS: error: source register and base register can't be identical
+@ CHECK-ERRORS: strh r0, [r0, r1]!
+@ CHECK-ERRORS:          ^
+@ CHECK-ERRORS: error: source register and base register can't be identical
+@ CHECK-ERRORS: strh r0, [r0], #2
+@ CHECK-ERRORS:          ^
+@ CHECK-ERRORS: error: source register and base register can't be identical
+@ CHECK-ERRORS: strh r0, [r0], r1
+@ CHECK-ERRORS:          ^
+@ CHECK-ERRORS: error: source register and base register can't be identical
 @ CHECK-ERRORS: strb r0, [r0, #1]!
 @ CHECK-ERRORS:          ^
 @ CHECK-ERRORS: error: source register and base register can't be identical