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[mips] Test case for r192124.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192135 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-10-07 21:32:57 +00:00
parent 1ee3c0008b
commit d56cba0b4b
1 changed files with 33 additions and 0 deletions
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33
test/CodeGen/Mips/disable-tail-merge.ll Normal file
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; RUN: llc -march=mipsel < %s | FileCheck %s
@g0 = common global i32 0, align 4
@g1 = common global i32 0, align 4
; CHECK: addiu ${{[0-9]+}}, ${{[0-9]+}}, 23
; CHECK: addiu ${{[0-9]+}}, ${{[0-9]+}}, 23
define i32 @test1(i32 %a) {
entry:
%tobool = icmp eq i32 %a, 0
%0 = load i32* @g0, align 4
br i1 %tobool, label %if.else, label %if.then
if.then:
%add = add nsw i32 %0, 1
store i32 %add, i32* @g0, align 4
%1 = load i32* @g1, align 4
%add1 = add nsw i32 %1, 23
br label %if.end
if.else:
%add2 = add nsw i32 %0, 11
store i32 %add2, i32* @g0, align 4
%2 = load i32* @g1, align 4
%add3 = add nsw i32 %2, 23
br label %if.end
if.end:
%storemerge = phi i32 [ %add3, %if.else ], [ %add1, %if.then ]
store i32 %storemerge, i32* @g1, align 4
ret i32 %storemerge
}