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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-04 22:07:27 +00:00
Fix tab infestation!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6109 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -467,22 +467,22 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// spilled to memory.
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//
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for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
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KE = LV->killed_end(MI); KI != KE; ++KI) {
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KE = LV->killed_end(MI); KI != KE; ++KI) {
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unsigned VirtReg = KI->second;
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unsigned PhysReg = VirtReg;
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if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
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std::map<unsigned, unsigned>::iterator I =
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Virt2PhysRegMap.find(VirtReg);
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assert(I != Virt2PhysRegMap.end());
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PhysReg = I->second;
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Virt2PhysRegMap.erase(I);
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}
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unsigned PhysReg = VirtReg;
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if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
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std::map<unsigned, unsigned>::iterator I =
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Virt2PhysRegMap.find(VirtReg);
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assert(I != Virt2PhysRegMap.end());
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PhysReg = I->second;
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Virt2PhysRegMap.erase(I);
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}
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if (PhysReg) {
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DEBUG(std::cerr << "V: " << VirtReg << " P: " << PhysReg
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<< " Killed by: " << *MI);
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removePhysReg(PhysReg);
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}
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if (PhysReg) {
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DEBUG(std::cerr << "V: " << VirtReg << " P: " << PhysReg
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<< " Killed by: " << *MI);
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removePhysReg(PhysReg);
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}
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}
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}
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@ -501,9 +501,9 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (const unsigned *ImplicitDefs = TID.ImplicitDefs)
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for (unsigned i = 0; ImplicitDefs[i]; ++i) {
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unsigned Reg = ImplicitDefs[i];
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spillPhysReg(MBB, I, Reg);
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PhysRegsUseOrder.push_back(Reg);
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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spillPhysReg(MBB, I, Reg);
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PhysRegsUseOrder.push_back(Reg);
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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}
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// Okay, we have allocated all of the source operands and spilled any values
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@ -513,19 +513,19 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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//
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
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if (MI->getOperand(i).opIsDef() &&
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MI->getOperand(i).isVirtualRegister()) {
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MI->getOperand(i).isVirtualRegister()) {
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unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
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unsigned DestPhysReg;
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// If DestVirtReg already has a value, forget about it. Why doesn't
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// getReg do this right?
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std::map<unsigned, unsigned>::iterator DestI =
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Virt2PhysRegMap.find(DestVirtReg);
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if (DestI != Virt2PhysRegMap.end()) {
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unsigned PhysReg = DestI->second;
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Virt2PhysRegMap.erase(DestI);
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removePhysReg(PhysReg);
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}
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// If DestVirtReg already has a value, forget about it. Why doesn't
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// getReg do this right?
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std::map<unsigned, unsigned>::iterator DestI =
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Virt2PhysRegMap.find(DestVirtReg);
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if (DestI != Virt2PhysRegMap.end()) {
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unsigned PhysReg = DestI->second;
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Virt2PhysRegMap.erase(DestI);
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removePhysReg(PhysReg);
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}
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if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
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// must be same register number as the first operand
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@ -536,12 +536,12 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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"Two address instruction invalid!");
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DestPhysReg = MI->getOperand(1).getAllocatedRegNum();
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liberatePhysReg(MBB, I, DestPhysReg);
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liberatePhysReg(MBB, I, DestPhysReg);
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assignVirtToPhysReg(DestVirtReg, DestPhysReg);
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} else {
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DestPhysReg = getReg(MBB, I, DestVirtReg);
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}
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markVirtRegModified(DestVirtReg);
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markVirtRegModified(DestVirtReg);
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MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
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}
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@ -550,22 +550,22 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// kill them now.
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//
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for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
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KE = LV->dead_end(MI); KI != KE; ++KI) {
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KE = LV->dead_end(MI); KI != KE; ++KI) {
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unsigned VirtReg = KI->second;
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unsigned PhysReg = VirtReg;
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if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
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std::map<unsigned, unsigned>::iterator I =
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Virt2PhysRegMap.find(VirtReg);
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assert(I != Virt2PhysRegMap.end());
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PhysReg = I->second;
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Virt2PhysRegMap.erase(I);
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}
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unsigned PhysReg = VirtReg;
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if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
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std::map<unsigned, unsigned>::iterator I =
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Virt2PhysRegMap.find(VirtReg);
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assert(I != Virt2PhysRegMap.end());
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PhysReg = I->second;
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Virt2PhysRegMap.erase(I);
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}
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if (PhysReg) {
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DEBUG(std::cerr << "V: " << VirtReg << " P: " << PhysReg
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<< " dead after: " << *MI);
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removePhysReg(PhysReg);
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}
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if (PhysReg) {
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DEBUG(std::cerr << "V: " << VirtReg << " P: " << PhysReg
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<< " dead after: " << *MI);
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removePhysReg(PhysReg);
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}
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}
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}
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}
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@ -582,9 +582,9 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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PhysRegsUsed.begin()->first);
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for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
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E = Virt2PhysRegMap.end(); I != E; ++I)
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E = Virt2PhysRegMap.end(); I != E; ++I)
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std::cerr << "Register still mapped: " << I->first << " -> "
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<< I->second << "\n";
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<< I->second << "\n";
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assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
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assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
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