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Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -26,6 +26,7 @@ class MachineBasicBlock;
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class MachineConstantPool;
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class MachineFunction;
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class MachineFrameInfo;
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class MachineModuleInfo;
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class MachineRegisterInfo;
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class TargetData;
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class TargetInstrInfo;
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@ -44,6 +45,7 @@ protected:
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DenseMap<const BasicBlock *, MachineBasicBlock *> &MBBMap;
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DenseMap<const AllocaInst *, int> &StaticAllocaMap;
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MachineFunction &MF;
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MachineModuleInfo *MMI;
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MachineRegisterInfo &MRI;
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MachineFrameInfo &MFI;
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MachineConstantPool &MCP;
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@ -94,6 +96,7 @@ public:
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protected:
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FastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am);
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@ -28,6 +28,7 @@ namespace llvm {
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class MachineBasicBlock;
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class MachineFunction;
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class MachineInstr;
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class MachineModuleInfo;
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class TargetLowering;
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class FunctionLoweringInfo;
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class HazardRecognizer;
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@ -106,7 +107,8 @@ protected:
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int64_t DesiredMaskS) const;
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private:
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void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF);
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void SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
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MachineModuleInfo *MMI);
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void FinishBasicBlock();
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void SelectBasicBlock(BasicBlock *LLVMBB,
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@ -40,6 +40,7 @@ namespace llvm {
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class MachineFunction;
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class MachineFrameInfo;
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class MachineInstr;
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class MachineModuleInfo;
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class SDNode;
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class SDValue;
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class SelectionDAG;
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@ -1120,6 +1121,7 @@ public:
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/// or null if the target does not support "fast" ISel.
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virtual FastISel *
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createFastISel(MachineFunction &,
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MachineModuleInfo *,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const AllocaInst *, int> &) {
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@ -450,7 +450,7 @@ FastISel::SelectOperator(User *I, unsigned Opcode) {
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UpdateValueMap(I, Reg);
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return true;
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}
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default:
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// Unhandled instruction. Halt "fast" selection and bail.
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return false;
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@ -458,6 +458,7 @@ FastISel::SelectOperator(User *I, unsigned Opcode) {
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}
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FastISel::FastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am)
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@ -466,6 +467,7 @@ FastISel::FastISel(MachineFunction &mf,
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MBBMap(bm),
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StaticAllocaMap(am),
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MF(mf),
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MMI(mmi),
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MRI(MF.getRegInfo()),
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MFI(*MF.getFrameInfo()),
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MCP(*MF.getConstantPool()),
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@ -309,7 +309,8 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) {
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DOUT << "\n\n\n=== " << Fn.getName() << "\n";
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FuncInfo->set(Fn, MF, EnableFastISel);
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CurDAG->init(MF, getAnalysisToUpdate<MachineModuleInfo>());
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MachineModuleInfo *MMI = getAnalysisToUpdate<MachineModuleInfo>();
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CurDAG->init(MF, MMI);
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SDL->init(GFI, *AA);
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for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
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@ -317,7 +318,7 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) {
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// Mark landing pad.
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FuncInfo->MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
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SelectAllBasicBlocks(Fn, MF);
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SelectAllBasicBlocks(Fn, MF, MMI);
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// If the first basic block in the function has live ins that need to be
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// copied into vregs, emit the copies into the top of the block before
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@ -710,7 +711,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
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DEBUG(BB->dump());
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}
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void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
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void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF,
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MachineModuleInfo *MMI) {
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for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
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BasicBlock *LLVMBB = &*I;
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BB = FuncInfo->MBBMap[LLVMBB];
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@ -726,7 +728,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(Function &Fn, MachineFunction &MF) {
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// Before doing SelectionDAG ISel, see if FastISel has been requested.
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// FastISel doesn't support EH landing pads, which require special handling.
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if (EnableFastISel && !BB->isLandingPad()) {
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if (FastISel *F = TLI.createFastISel(*FuncInfo->MF, FuncInfo->ValueMap,
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if (FastISel *F = TLI.createFastISel(*FuncInfo->MF, MMI,
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FuncInfo->ValueMap,
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FuncInfo->MBBMap,
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FuncInfo->StaticAllocaMap)) {
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// Emit code for any incoming arguments. This must happen before
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@ -49,10 +49,11 @@ class X86FastISel : public FastISel {
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public:
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explicit X86FastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am)
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: FastISel(mf, vm, bm, am) {
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: FastISel(mf, mmi, vm, bm, am) {
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Subtarget = &TM.getSubtarget<X86Subtarget>();
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StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP;
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X86ScalarSSEf64 = Subtarget->hasSSE2();
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@ -1160,9 +1161,10 @@ unsigned X86FastISel::TargetMaterializeAlloca(AllocaInst *C) {
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namespace llvm {
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llvm::FastISel *X86::createFastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am) {
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return new X86FastISel(mf, vm, bm, am);
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return new X86FastISel(mf, mmi, vm, bm, am);
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}
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}
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@ -1866,12 +1866,13 @@ bool X86TargetLowering::IsEligibleForTailCallOptimization(CallSDNode *TheCall,
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FastISel *
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X86TargetLowering::createFastISel(MachineFunction &mf,
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MachineModuleInfo *mmo,
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DenseMap<const Value *, unsigned> &vm,
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DenseMap<const BasicBlock *,
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MachineBasicBlock *> &bm,
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DenseMap<const AllocaInst *, int> &am) {
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return X86::createFastISel(mf, vm, bm, am);
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return X86::createFastISel(mf, mmo, vm, bm, am);
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}
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@ -472,6 +472,7 @@ namespace llvm {
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/// or null if the target does not support "fast" ISel.
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virtual FastISel *
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createFastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const AllocaInst *, int> &);
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@ -604,6 +605,7 @@ namespace llvm {
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namespace X86 {
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FastISel *createFastISel(MachineFunction &mf,
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MachineModuleInfo *mmi,
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DenseMap<const Value *, unsigned> &,
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DenseMap<const BasicBlock *, MachineBasicBlock *> &,
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DenseMap<const AllocaInst *, int> &);
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