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[ARM64] Simplify if condition.

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v2f32 and v4f32 were missed out of these conditions, so this is also
a bugfix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207628 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Molloy 2014-04-30 10:15:50 +00:00
parent d98970d80d
commit d5acbbf90b
1 changed files with 2 additions and 6 deletions
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8
lib/Target/ARM64/ARM64ISelLowering.cpp
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@ -1678,13 +1678,9 @@ SDValue ARM64TargetLowering::LowerFormalArguments(
RC = &ARM64::GPR64RegClass;
else if (RegVT == MVT::f32)
RC = &ARM64::FPR32RegClass;
else if (RegVT == MVT::f64 || RegVT == MVT::v1i64 ||
RegVT == MVT::v1f64 || RegVT == MVT::v2i32 ||
RegVT == MVT::v4i16 || RegVT == MVT::v8i8)
else if (RegVT == MVT::f64 || RegVT.is64BitVector())
RC = &ARM64::FPR64RegClass;
else if (RegVT == MVT::f128 ||RegVT == MVT::v2i64 ||
RegVT == MVT::v4i32||RegVT == MVT::v8i16 ||
RegVT == MVT::v16i8)
else if (RegVT == MVT::f128 || RegVT.is128BitVector())
RC = &ARM64::FPR128RegClass;
else
llvm_unreachable("RegVT not supported by FORMAL_ARGUMENTS Lowering");