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Okay, over/back tags don't next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40904 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -121,13 +121,15 @@ equivalent hardware instructions.
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=head1 CODE GENERATION OPTIONS
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=over
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=over 4
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=item B<-code-model>=I<model>
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Choose the code model from:
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=over 2
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=back
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=over 8
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=item I<default>: Target default code model
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@ -141,6 +143,8 @@ Choose the code model from:
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=back
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=over 4
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=item B<-disable-post-RA-scheduler>
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Disable scheduling after register allocation.
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@ -168,7 +172,9 @@ Don't place zero-initialized symbols into the BSS section.
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Instruction schedulers available (before register allocation):
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=over 2
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=back
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=over 8
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=item I<=default>: Best scheduler for the target
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@ -186,11 +192,15 @@ Instruction schedulers available (before register allocation):
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=back
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=over 4
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=item B<-regalloc>=I<allocator>
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Register allocator to use: (default = linearscan)
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=over 2
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=back
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=over 8
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=item I<=bigblock>: Big-block register allocator
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@ -200,11 +210,15 @@ Register allocator to use: (default = linearscan)
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=back
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=over 4
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=item B<-relocation-model>=I<model>
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Choose relocation model from:
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=over 2
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=back
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=over 8
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=item I<=default>: Target default relocation model
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@ -214,11 +228,15 @@ Choose relocation model from:
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=back
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=over 4
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=item B<-spiller>
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Spiller to use: (default: local)
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=over 2
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=back
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=over 8
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=item I<=simple>: simple spiller
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@ -226,11 +244,15 @@ Spiller to use: (default: local)
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=back
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=over 4
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=item B<-x86-asm-syntax>=I<syntax>
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Choose style of code to emit from X86 backend:
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=over 2
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=back
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=over 8
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=item I<=att>: Emit AT&T-style assembly
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@ -238,8 +260,6 @@ Choose style of code to emit from X86 backend:
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=back
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=back
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=head1 EXIT STATUS
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If B<lli> fails to load the program, it will exit with an exit code of 1.
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