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Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164685 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Molloy 2012-09-26 09:48:32 +00:00
parent d72271cd84
commit d6d10ae151
2 changed files with 23 additions and 2 deletions
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4
lib/Target/ARM/ARMISelLowering.cpp
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@ -5594,7 +5594,7 @@ ARMTargetLowering::EmitAtomicBinaryMinMax(MachineInstr *MI,
// ldrex dest, ptr // ldrex dest, ptr
// (sign extend dest, if required) // (sign extend dest, if required)
// cmp dest, incr // cmp dest, incr
// cmov.cond scratch2, dest, incr // cmov.cond scratch2, incr, dest
// strex scratch, scratch2, ptr // strex scratch, scratch2, ptr
// cmp scratch, #0 // cmp scratch, #0
// bne- loopMBB // bne- loopMBB
@ -5617,7 +5617,7 @@ ARMTargetLowering::EmitAtomicBinaryMinMax(MachineInstr *MI,
AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr)) AddDefaultPred(BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr))
.addReg(oldval).addReg(incr)); .addReg(oldval).addReg(incr));
BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2MOVCCr : ARM::MOVCCr), scratch2) BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2MOVCCr : ARM::MOVCCr), scratch2)
.addReg(oldval).addReg(incr).addImm(Cond).addReg(ARM::CPSR); .addReg(incr).addReg(oldval).addImm(Cond).addReg(ARM::CPSR);
MIB = BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2).addReg(ptr); MIB = BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2).addReg(ptr);
if (strOpc == ARM::t2STREX) if (strOpc == ARM::t2STREX)

21
test/CodeGen/ARM/atomicrmw_minmax.ll Normal file
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@ -0,0 +1,21 @@
; RUN: llc -march=arm -mcpu=cortex-a9 %s -o - |& FileCheck %s
; CHECK: max:
define i32 @max(i8 %ctx, i32* %ptr, i32 %val)
{
; CHECK: ldrex
; CHECK: cmp [[old:r[0-9]*]], [[val:r[0-9]*]]
; CHECK: movhi {{r[0-9]*}}, [[old]]
%old = atomicrmw umax i32* %ptr, i32 %val monotonic
ret i32 %old
}
; CHECK: min:
define i32 @min(i8 %ctx, i32* %ptr, i32 %val)
{
; CHECK: ldrex
; CHECK: cmp [[old:r[0-9]*]], [[val:r[0-9]*]]
; CHECK: movlo {{r[0-9]*}}, [[old]]
%old = atomicrmw umin i32* %ptr, i32 %val monotonic
ret i32 %old
}