6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-27 16:17:17 +00:00
Code Issues Projects Releases Wiki Activity

Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108094 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
2010-07-11 16:49:10 +00:00
parent db77609991
commit d6d7abaf4e
5 changed files with 1 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/Target/TargetRegisterInfo.h
View File

@@ -321,7 +321,7 @@ public:
/// getPhysicalRegisterRegClass - Returns the Register Class of a physical /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
/// register of the given type. If type is EVT::Other, then just return any /// register of the given type. If type is EVT::Other, then just return any
/// register class the register belongs to. /// register class the register belongs to.
virtual const TargetRegisterClass * const TargetRegisterClass *
getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const; getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
/// getMinimalPhysRegClass - Returns the Register Class of a physical /// getMinimalPhysRegClass - Returns the Register Class of a physical

15
lib/Target/ARM/Thumb1RegisterInfo.cpp
View File

@@ -68,21 +68,6 @@ void Thumb1RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB,
.addConstantPoolIndex(Idx).addImm(Pred).addReg(PredReg); .addConstantPoolIndex(Idx).addImm(Pred).addReg(PredReg);
} }
const TargetRegisterClass*
Thumb1RegisterInfo::getPhysicalRegisterRegClass(unsigned Reg, EVT VT) const {
if (isARMLowRegister(Reg))
return ARM::tGPRRegisterClass;
switch (Reg) {
default:
break;
case ARM::R8: case ARM::R9: case ARM::R10: case ARM::R11:
case ARM::R12: case ARM::SP: case ARM::LR: case ARM::PC:
return ARM::GPRRegisterClass;
}
return TargetRegisterInfo::getPhysicalRegisterRegClass(Reg, VT);
}
bool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const { bool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
const MachineFrameInfo *FFI = MF.getFrameInfo(); const MachineFrameInfo *FFI = MF.getFrameInfo();
unsigned CFSize = FFI->getMaxCallFrameSize(); unsigned CFSize = FFI->getMaxCallFrameSize();

3
lib/Target/ARM/Thumb1RegisterInfo.h
View File

@@ -38,9 +38,6 @@ public:
unsigned PredReg = 0) const; unsigned PredReg = 0) const;
/// Code Generation virtual methods... /// Code Generation virtual methods...
const TargetRegisterClass *
getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
bool hasReservedCallFrame(MachineFunction &MF) const; bool hasReservedCallFrame(MachineFunction &MF) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF, void eliminateCallFramePseudoInstr(MachineFunction &MF,

19
lib/Target/Blackfin/BlackfinRegisterInfo.cpp
View File

@@ -75,25 +75,6 @@ BlackfinRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
return Reserved; return Reserved;
} }
const TargetRegisterClass*
BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
assert(isPhysicalRegister(reg) && "reg must be a physical register");
// Pick the smallest register class of the right type that contains
// this physreg.
const TargetRegisterClass* BestRC = 0;
for (regclass_iterator I = regclass_begin(), E = regclass_end();
I != E; ++I) {
const TargetRegisterClass* RC = *I;
if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) &&
(!BestRC || RC->getNumRegs() < BestRC->getNumRegs()))
BestRC = RC;
}
assert(BestRC && "Couldn't find the register class");
return BestRC;
}
// hasFP - Return true if the specified function should have a dedicated frame // hasFP - Return true if the specified function should have a dedicated frame
// pointer register. This is true if the function has variable sized allocas or // pointer register. This is true if the function has variable sized allocas or
// if frame pointer elimination is disabled. // if frame pointer elimination is disabled.

3
lib/Target/Blackfin/BlackfinRegisterInfo.h
View File

@@ -41,9 +41,6 @@ namespace llvm {
return &BF::PRegClass; return &BF::PRegClass;
} }
const TargetRegisterClass *getPhysicalRegisterRegClass(unsigned reg,
EVT VT) const;
bool hasFP(const MachineFunction &MF) const; bool hasFP(const MachineFunction &MF) const;
// bool hasReservedCallFrame(MachineFunction &MF) const; // bool hasReservedCallFrame(MachineFunction &MF) const;