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Switch the MachineOperand accessors back to the short names like

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isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-10-03 15:45:36 +00:00
parent 06a62886fb
commit d735b8019b
71 changed files with 538 additions and 530 deletions
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6
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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@ -544,13 +544,13 @@ static bool isMemoryOp(MachineInstr *MI) {
default: break;
case ARM::LDR:
case ARM::STR:
return MI->getOperand(1).isRegister() && MI->getOperand(2).getReg() == 0;
return MI->getOperand(1).isReg() && MI->getOperand(2).getReg() == 0;
case ARM::FLDS:
case ARM::FSTS:
return MI->getOperand(1).isRegister();
return MI->getOperand(1).isReg();
case ARM::FLDD:
case ARM::FSTD:
return MI->getOperand(1).isRegister();
return MI->getOperand(1).isReg();
}
return false;
}