From d7efef9d1481a96425e09b8a37114c815ab5da1c Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 5 Aug 2003 03:53:04 +0000 Subject: [PATCH] The CodeEmitterGenerator used to consider ANY uninitialized field as being an operand (unless it's annul or predict). Now we only consider fields to be operands if they are uninitialized AND used in the "Inst" field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7589 91177308-0d34-0410-b5e6-96231b3b80d8 --- support/tools/TableGen/CodeEmitterGen.cpp | 96 +++++++++++------------ utils/TableGen/CodeEmitterGen.cpp | 96 +++++++++++------------ 2 files changed, 96 insertions(+), 96 deletions(-) diff --git a/support/tools/TableGen/CodeEmitterGen.cpp b/support/tools/TableGen/CodeEmitterGen.cpp index 4aaeed8e7a4..f3b238c613c 100644 --- a/support/tools/TableGen/CodeEmitterGen.cpp +++ b/support/tools/TableGen/CodeEmitterGen.cpp @@ -46,30 +46,22 @@ void CodeEmitterGen::run(std::ostream &o) { DEBUG(o << " // " << *R->getValue("Inst") << "\n"); o << " Value = " << Value << "U;\n\n"; - // Loop over all of the fields in the instruction adding in any - // contributions to this value (due to bit references). + // Loop over all of the fields in the instruction determining which are the + // operands to the instruction. // unsigned op = 0; - std::map OpOrder; - std::map OpContinuous; + std::map OpOrder; + std::map OpContinuous; for (unsigned i = 0, e = Vals.size(); i != e; ++i) { - if (Vals[i].getName() != "Inst" && - !Vals[i].getValue()->isComplete() && + if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete() && /* ignore annul and predict bits since no one sets them yet */ - Vals[i].getName() != "annul" && - Vals[i].getName() != "predict") + Vals[i].getName() != "annul" && Vals[i].getName() != "predict") { - o << " // op" << op << ": " << Vals[i].getName() << "\n" - << " int64_t op" << op - <<" = getMachineOpValue(MI, MI.getOperand("<getNumBits()-1; bit >= 0; --bit) { @@ -111,9 +103,8 @@ void CodeEmitterGen::run(std::ostream &o) { // maintain same distance between bits in field and bits in // instruction. if the relative distances stay the same // throughout, - if ((beginBitInVar - (int)VBI->getBitNum()) != - (beginBitInInst - bit)) - { + if (beginBitInVar - (int)VBI->getBitNum() != + beginBitInInst - bit) { continuous = false; break; } @@ -121,39 +112,48 @@ void CodeEmitterGen::run(std::ostream &o) { } } - DEBUG(o << " // Var: begin = " << beginBitInVar - << ", end = " << endBitInVar - << "; Inst: begin = " << beginBitInInst - << ", end = " << endBitInInst << "\n"); - - if (continuous) { - DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()] - << "\n"); + if (beginBitInInst != -1) { + o << " // op" << op << ": " << Vals[i].getName() << "\n" + << " int64_t op" << op + <<" = getMachineOpValue(MI, MI.getOperand("<>= " << endBitInVar << ";\n"; - beginBitInVar -= endBitInVar; - endBitInVar = 0; - } - - // High mask - o << " op" << OpOrder[Vals[i].getName()] - << " &= (1<<" << beginBitInVar+1 << ") - 1;\n"; - - // Shift the value to the correct place (according to place in instr) - if (endBitInInst != 0) + DEBUG(o << " // Var: begin = " << beginBitInVar + << ", end = " << endBitInVar + << "; Inst: begin = " << beginBitInInst + << ", end = " << endBitInInst << "\n"); + + if (continuous) { + DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()] + << "\n"); + + // Mask off the right bits + // Low mask (ie. shift, if necessary) + if (endBitInVar != 0) { + o << " op" << OpOrder[Vals[i].getName()] + << " >>= " << endBitInVar << ";\n"; + beginBitInVar -= endBitInVar; + endBitInVar = 0; + } + + // High mask o << " op" << OpOrder[Vals[i].getName()] + << " &= (1<<" << beginBitInVar+1 << ") - 1;\n"; + + // Shift the value to the correct place (according to place in inst) + if (endBitInInst != 0) + o << " op" << OpOrder[Vals[i].getName()] << " <<= " << endBitInInst << ";\n"; - - // Just OR in the result - o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n"; + + // Just OR in the result + o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n"; + } + + // otherwise, will be taken care of in the loop below using this + // value: + OpContinuous[Vals[i].getName()] = continuous; } - - // otherwise, will be taken care of in the loop below using this value: - OpContinuous[Vals[i].getName()] = continuous; } } diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index 4aaeed8e7a4..f3b238c613c 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -46,30 +46,22 @@ void CodeEmitterGen::run(std::ostream &o) { DEBUG(o << " // " << *R->getValue("Inst") << "\n"); o << " Value = " << Value << "U;\n\n"; - // Loop over all of the fields in the instruction adding in any - // contributions to this value (due to bit references). + // Loop over all of the fields in the instruction determining which are the + // operands to the instruction. // unsigned op = 0; - std::map OpOrder; - std::map OpContinuous; + std::map OpOrder; + std::map OpContinuous; for (unsigned i = 0, e = Vals.size(); i != e; ++i) { - if (Vals[i].getName() != "Inst" && - !Vals[i].getValue()->isComplete() && + if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete() && /* ignore annul and predict bits since no one sets them yet */ - Vals[i].getName() != "annul" && - Vals[i].getName() != "predict") + Vals[i].getName() != "annul" && Vals[i].getName() != "predict") { - o << " // op" << op << ": " << Vals[i].getName() << "\n" - << " int64_t op" << op - <<" = getMachineOpValue(MI, MI.getOperand("<getNumBits()-1; bit >= 0; --bit) { @@ -111,9 +103,8 @@ void CodeEmitterGen::run(std::ostream &o) { // maintain same distance between bits in field and bits in // instruction. if the relative distances stay the same // throughout, - if ((beginBitInVar - (int)VBI->getBitNum()) != - (beginBitInInst - bit)) - { + if (beginBitInVar - (int)VBI->getBitNum() != + beginBitInInst - bit) { continuous = false; break; } @@ -121,39 +112,48 @@ void CodeEmitterGen::run(std::ostream &o) { } } - DEBUG(o << " // Var: begin = " << beginBitInVar - << ", end = " << endBitInVar - << "; Inst: begin = " << beginBitInInst - << ", end = " << endBitInInst << "\n"); - - if (continuous) { - DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()] - << "\n"); + if (beginBitInInst != -1) { + o << " // op" << op << ": " << Vals[i].getName() << "\n" + << " int64_t op" << op + <<" = getMachineOpValue(MI, MI.getOperand("<>= " << endBitInVar << ";\n"; - beginBitInVar -= endBitInVar; - endBitInVar = 0; - } - - // High mask - o << " op" << OpOrder[Vals[i].getName()] - << " &= (1<<" << beginBitInVar+1 << ") - 1;\n"; - - // Shift the value to the correct place (according to place in instr) - if (endBitInInst != 0) + DEBUG(o << " // Var: begin = " << beginBitInVar + << ", end = " << endBitInVar + << "; Inst: begin = " << beginBitInInst + << ", end = " << endBitInInst << "\n"); + + if (continuous) { + DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()] + << "\n"); + + // Mask off the right bits + // Low mask (ie. shift, if necessary) + if (endBitInVar != 0) { + o << " op" << OpOrder[Vals[i].getName()] + << " >>= " << endBitInVar << ";\n"; + beginBitInVar -= endBitInVar; + endBitInVar = 0; + } + + // High mask o << " op" << OpOrder[Vals[i].getName()] + << " &= (1<<" << beginBitInVar+1 << ") - 1;\n"; + + // Shift the value to the correct place (according to place in inst) + if (endBitInInst != 0) + o << " op" << OpOrder[Vals[i].getName()] << " <<= " << endBitInInst << ";\n"; - - // Just OR in the result - o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n"; + + // Just OR in the result + o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n"; + } + + // otherwise, will be taken care of in the loop below using this + // value: + OpContinuous[Vals[i].getName()] = continuous; } - - // otherwise, will be taken care of in the loop below using this value: - OpContinuous[Vals[i].getName()] = continuous; } }