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ARM: Update NEON assembly two-operand aliases.
Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases for NEON instructions. There's still more to go, but this is a good chunk of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155210 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
parent
7605b29e27
commit
d8b3ed8f25
@ -1862,7 +1862,6 @@ class N3V<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op6, bit op4,
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string opc, string dt, string asm, string cstr, list<dag> pattern>
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: N3VCommon<op24, op23, op21_20, op11_8, op6, op4,
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oops, iops, f, itin, opc, dt, asm, cstr, pattern> {
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// Instruction operands.
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bits<5> Vd;
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bits<5> Vn;
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@ -2368,6 +2368,8 @@ class N3VD<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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(outs DPR:$Vd), (ins DPR:$Vn, DPR:$Vm), N3RegFrm, itin,
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OpcodeStr, Dt, "$Vd, $Vn, $Vm", "",
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[(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]> {
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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// Same as N3VD but no data type.
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@ -2379,6 +2381,8 @@ class N3VDX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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(outs DPR:$Vd), (ins DPR:$Vn, DPR:$Vm), N3RegFrm, itin,
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OpcodeStr, "$Vd, $Vn, $Vm", "",
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[(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]>{
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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@ -2411,6 +2415,8 @@ class N3VQ<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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(outs QPR:$Vd), (ins QPR:$Vn, QPR:$Vm), N3RegFrm, itin,
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OpcodeStr, Dt, "$Vd, $Vn, $Vm", "",
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[(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]> {
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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class N3VQX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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@ -2420,6 +2426,8 @@ class N3VQX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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(outs QPR:$Vd), (ins QPR:$Vn, QPR:$Vm), N3RegFrm, itin,
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OpcodeStr, "$Vd, $Vn, $Vm", "",
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[(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]>{
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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class N3VQSL<bits<2> op21_20, bits<4> op11_8,
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@ -2454,6 +2462,8 @@ class N3VDInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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(outs DPR:$Vd), (ins DPR:$Vn, DPR:$Vm), f, itin,
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OpcodeStr, Dt, "$Vd, $Vn, $Vm", "",
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[(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vn), (OpTy DPR:$Vm))))]> {
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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class N3VDIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin,
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@ -2494,6 +2504,8 @@ class N3VQInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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(outs QPR:$Vd), (ins QPR:$Vn, QPR:$Vm), f, itin,
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OpcodeStr, Dt, "$Vd, $Vn, $Vm", "",
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[(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vn), (OpTy QPR:$Vm))))]> {
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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class N3VQIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin,
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@ -2830,6 +2842,8 @@ class N3VW<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4,
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OpcodeStr, Dt, "$Vd, $Vn, $Vm", "",
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[(set QPR:$Vd, (OpNode (TyQ QPR:$Vn),
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(TyQ (ExtOp (TyD DPR:$Vm)))))]> {
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// All of these have a two-operand InstAlias.
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let TwoOperandAliasConstraint = "$Vn = $Vd";
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let isCommutable = Commutable;
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}
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@ -5742,69 +5756,6 @@ def : VFP2InstAlias<"fmdhr${p} $Dd, $Rn",
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def : VFP2InstAlias<"fmdlr${p} $Dd, $Rn",
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(VSETLNi32 DPR:$Dd, GPR:$Rn, 0, pred:$p)>;
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// VADD two-operand aliases.
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def : NEONInstAlias<"vadd${p}.i8 $Vdn, $Vm",
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(VADDv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i16 $Vdn, $Vm",
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(VADDv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i32 $Vdn, $Vm",
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(VADDv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i64 $Vdn, $Vm",
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(VADDv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i8 $Vdn, $Vm",
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(VADDv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i16 $Vdn, $Vm",
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(VADDv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i32 $Vdn, $Vm",
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(VADDv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.i64 $Vdn, $Vm",
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(VADDv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.f32 $Vdn, $Vm",
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(VADDfd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vadd${p}.f32 $Vdn, $Vm",
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(VADDfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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// VSUB two-operand aliases.
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def : NEONInstAlias<"vsub${p}.i8 $Vdn, $Vm",
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(VSUBv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i16 $Vdn, $Vm",
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(VSUBv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i32 $Vdn, $Vm",
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(VSUBv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i64 $Vdn, $Vm",
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(VSUBv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i8 $Vdn, $Vm",
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(VSUBv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i16 $Vdn, $Vm",
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(VSUBv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i32 $Vdn, $Vm",
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(VSUBv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.i64 $Vdn, $Vm",
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(VSUBv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.f32 $Vdn, $Vm",
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(VSUBfd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vsub${p}.f32 $Vdn, $Vm",
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(VSUBfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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// VADDW two-operand aliases.
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def : NEONInstAlias<"vaddw${p}.s8 $Vdn, $Vm",
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(VADDWsv8i16 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vaddw${p}.s16 $Vdn, $Vm",
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(VADDWsv4i32 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vaddw${p}.s32 $Vdn, $Vm",
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(VADDWsv2i64 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vaddw${p}.u8 $Vdn, $Vm",
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(VADDWuv8i16 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vaddw${p}.u16 $Vdn, $Vm",
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(VADDWuv4i32 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vaddw${p}.u32 $Vdn, $Vm",
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(VADDWuv2i64 QPR:$Vdn, QPR:$Vdn, DPR:$Vm, pred:$p)>;
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// VAND/VBIC/VEOR/VORR accept but do not require a type suffix.
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defm : NEONDTAnyInstAlias<"vand${p}", "$Vd, $Vn, $Vm",
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(VANDd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>;
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@ -5823,23 +5774,6 @@ defm : NEONDTAnyInstAlias<"vorr${p}", "$Vd, $Vn, $Vm",
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defm : NEONDTAnyInstAlias<"vorr${p}", "$Vd, $Vn, $Vm",
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(VORRq QPR:$Vd, QPR:$Vn, QPR:$Vm, pred:$p)>;
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// ... two-operand aliases
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def : NEONInstAlias<"vand${p} $Vdn, $Vm",
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(VANDd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vand${p} $Vdn, $Vm",
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(VANDq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vbic${p} $Vdn, $Vm",
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(VBICd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vbic${p} $Vdn, $Vm",
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(VBICq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"veor${p} $Vdn, $Vm",
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(VEORd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"veor${p} $Vdn, $Vm",
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(VEORq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vorr${p} $Vdn, $Vm",
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(VORRd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vorr${p} $Vdn, $Vm",
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(VORRq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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defm : NEONDTAnyInstAlias<"vand${p}", "$Vdn, $Vm",
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(VANDd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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defm : NEONDTAnyInstAlias<"vand${p}", "$Vdn, $Vm",
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@ -5854,29 +5788,6 @@ defm : NEONDTAnyInstAlias<"vorr${p}", "$Vdn, $Vm",
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(VORRq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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// VMUL two-operand aliases.
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def : NEONInstAlias<"vmul${p}.p8 $Qdn, $Qm",
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(VMULpq QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i8 $Qdn, $Qm",
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(VMULv16i8 QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i16 $Qdn, $Qm",
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(VMULv8i16 QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i32 $Qdn, $Qm",
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(VMULv4i32 QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.p8 $Ddn, $Dm",
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(VMULpd DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i8 $Ddn, $Dm",
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(VMULv8i8 DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i16 $Ddn, $Dm",
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(VMULv4i16 DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i32 $Ddn, $Dm",
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(VMULv2i32 DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.f32 $Qdn, $Qm",
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(VMULfq QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.f32 $Ddn, $Dm",
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(VMULfd DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
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def : NEONInstAlias<"vmul${p}.i16 $Ddn, $Dm$lane",
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(VMULslv4i16 DPR:$Ddn, DPR:$Ddn, DPR_8:$Dm,
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VectorIndex16:$lane, pred:$p)>;
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@ -5898,41 +5809,6 @@ def : NEONInstAlias<"vmul${p}.f32 $Qdn, $Dm$lane",
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(VMULslfq QPR:$Qdn, QPR:$Qdn, DPR_VFP2:$Dm,
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VectorIndex32:$lane, pred:$p)>;
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// VQADD (register) two-operand aliases.
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def : NEONInstAlias<"vqadd${p}.s8 $Vdn, $Vm",
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(VQADDsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s16 $Vdn, $Vm",
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(VQADDsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s32 $Vdn, $Vm",
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(VQADDsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s64 $Vdn, $Vm",
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(VQADDsv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u8 $Vdn, $Vm",
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(VQADDuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u16 $Vdn, $Vm",
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(VQADDuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u32 $Vdn, $Vm",
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(VQADDuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u64 $Vdn, $Vm",
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(VQADDuv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s8 $Vdn, $Vm",
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(VQADDsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s16 $Vdn, $Vm",
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(VQADDsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s32 $Vdn, $Vm",
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(VQADDsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.s64 $Vdn, $Vm",
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(VQADDsv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u8 $Vdn, $Vm",
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(VQADDuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u16 $Vdn, $Vm",
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(VQADDuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u32 $Vdn, $Vm",
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(VQADDuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vqadd${p}.u64 $Vdn, $Vm",
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(VQADDuv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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// VSHL (immediate) two-operand aliases.
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def : NEONInstAlias<"vshl${p}.i8 $Vdn, $imm",
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(VSHLiv8i8 DPR:$Vdn, DPR:$Vdn, imm0_7:$imm, pred:$p)>;
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@ -6873,78 +6749,6 @@ def : NEONInstAlias<"vqdmulh${p}.s16 $Vdn, $Vm",
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def : NEONInstAlias<"vqdmulh${p}.s32 $Vdn, $Vm",
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(VQDMULHv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
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// Two-operand variants for VMAX.
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def : NEONInstAlias<"vmax${p}.s8 $Vdn, $Vm",
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(VMAXsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmax${p}.s16 $Vdn, $Vm",
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(VMAXsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmax${p}.s32 $Vdn, $Vm",
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(VMAXsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmax${p}.u8 $Vdn, $Vm",
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(VMAXuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmax${p}.u16 $Vdn, $Vm",
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(VMAXuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmax${p}.u32 $Vdn, $Vm",
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(VMAXuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmax${p}.f32 $Vdn, $Vm",
|
||||
(VMAXfd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vmax${p}.s8 $Vdn, $Vm",
|
||||
(VMAXsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmax${p}.s16 $Vdn, $Vm",
|
||||
(VMAXsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmax${p}.s32 $Vdn, $Vm",
|
||||
(VMAXsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmax${p}.u8 $Vdn, $Vm",
|
||||
(VMAXuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmax${p}.u16 $Vdn, $Vm",
|
||||
(VMAXuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmax${p}.u32 $Vdn, $Vm",
|
||||
(VMAXuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmax${p}.f32 $Vdn, $Vm",
|
||||
(VMAXfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
|
||||
// Two-operand variants for VMIN.
|
||||
def : NEONInstAlias<"vmin${p}.s8 $Vdn, $Vm",
|
||||
(VMINsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.s16 $Vdn, $Vm",
|
||||
(VMINsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.s32 $Vdn, $Vm",
|
||||
(VMINsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.u8 $Vdn, $Vm",
|
||||
(VMINuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.u16 $Vdn, $Vm",
|
||||
(VMINuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.u32 $Vdn, $Vm",
|
||||
(VMINuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.f32 $Vdn, $Vm",
|
||||
(VMINfd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vmin${p}.s8 $Vdn, $Vm",
|
||||
(VMINsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.s16 $Vdn, $Vm",
|
||||
(VMINsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.s32 $Vdn, $Vm",
|
||||
(VMINsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.u8 $Vdn, $Vm",
|
||||
(VMINuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.u16 $Vdn, $Vm",
|
||||
(VMINuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.u32 $Vdn, $Vm",
|
||||
(VMINuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vmin${p}.f32 $Vdn, $Vm",
|
||||
(VMINfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
|
||||
// Two-operand variants for VPADD.
|
||||
def : NEONInstAlias<"vpadd${p}.i8 $Vdn, $Vm",
|
||||
(VPADDi8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vpadd${p}.i16 $Vdn, $Vm",
|
||||
(VPADDi16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vpadd${p}.i32 $Vdn, $Vm",
|
||||
(VPADDi32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vpadd${p}.f32 $Vdn, $Vm",
|
||||
(VPADDf DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
// Two-operand variants for VSRA.
|
||||
// Signed.
|
||||
def : NEONInstAlias<"vsra${p}.s8 $Vdm, $imm",
|
||||
@ -7022,100 +6826,6 @@ def : NEONInstAlias<"vsli${p}.32 $Vdm, $imm",
|
||||
def : NEONInstAlias<"vsli${p}.64 $Vdm, $imm",
|
||||
(VSLIv2i64 QPR:$Vdm, QPR:$Vdm, shr_imm64:$imm, pred:$p)>;
|
||||
|
||||
// Two-operand variants for VHSUB.
|
||||
// Signed.
|
||||
def : NEONInstAlias<"vhsub${p}.s8 $Vdn, $Vm",
|
||||
(VHSUBsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.s16 $Vdn, $Vm",
|
||||
(VHSUBsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.s32 $Vdn, $Vm",
|
||||
(VHSUBsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vhsub${p}.s8 $Vdn, $Vm",
|
||||
(VHSUBsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.s16 $Vdn, $Vm",
|
||||
(VHSUBsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.s32 $Vdn, $Vm",
|
||||
(VHSUBsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
|
||||
// Unsigned.
|
||||
def : NEONInstAlias<"vhsub${p}.u8 $Vdn, $Vm",
|
||||
(VHSUBuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.u16 $Vdn, $Vm",
|
||||
(VHSUBuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.u32 $Vdn, $Vm",
|
||||
(VHSUBuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vhsub${p}.u8 $Vdn, $Vm",
|
||||
(VHSUBuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.u16 $Vdn, $Vm",
|
||||
(VHSUBuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhsub${p}.u32 $Vdn, $Vm",
|
||||
(VHSUBuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
|
||||
|
||||
// Two-operand variants for VHADD.
|
||||
// Signed.
|
||||
def : NEONInstAlias<"vhadd${p}.s8 $Vdn, $Vm",
|
||||
(VHADDsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.s16 $Vdn, $Vm",
|
||||
(VHADDsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.s32 $Vdn, $Vm",
|
||||
(VHADDsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vhadd${p}.s8 $Vdn, $Vm",
|
||||
(VHADDsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.s16 $Vdn, $Vm",
|
||||
(VHADDsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.s32 $Vdn, $Vm",
|
||||
(VHADDsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
|
||||
// Unsigned.
|
||||
def : NEONInstAlias<"vhadd${p}.u8 $Vdn, $Vm",
|
||||
(VHADDuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.u16 $Vdn, $Vm",
|
||||
(VHADDuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.u32 $Vdn, $Vm",
|
||||
(VHADDuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vhadd${p}.u8 $Vdn, $Vm",
|
||||
(VHADDuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.u16 $Vdn, $Vm",
|
||||
(VHADDuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
def : NEONInstAlias<"vhadd${p}.u32 $Vdn, $Vm",
|
||||
(VHADDuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
|
||||
|
||||
// Two-operand variants for VRHADD.
|
||||
// Signed.
|
||||
def : NEONInstAlias<"vrhadd${p}.s8 $Vdn, $Rm",
|
||||
(VRHADDsv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.s16 $Vdn, $Rm",
|
||||
(VRHADDsv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.s32 $Vdn, $Rm",
|
||||
(VRHADDsv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Rm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vrhadd${p}.s8 $Vdn, $Rm",
|
||||
(VRHADDsv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.s16 $Vdn, $Rm",
|
||||
(VRHADDsv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.s32 $Vdn, $Rm",
|
||||
(VRHADDsv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Rm, pred:$p)>;
|
||||
|
||||
// Unsigned.
|
||||
def : NEONInstAlias<"vrhadd${p}.u8 $Vdn, $Rm",
|
||||
(VRHADDuv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.u16 $Vdn, $Rm",
|
||||
(VRHADDuv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.u32 $Vdn, $Rm",
|
||||
(VRHADDuv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Rm, pred:$p)>;
|
||||
|
||||
def : NEONInstAlias<"vrhadd${p}.u8 $Vdn, $Rm",
|
||||
(VRHADDuv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.u16 $Vdn, $Rm",
|
||||
(VRHADDuv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Rm, pred:$p)>;
|
||||
def : NEONInstAlias<"vrhadd${p}.u32 $Vdn, $Rm",
|
||||
(VRHADDuv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Rm, pred:$p)>;
|
||||
|
||||
// VSWP allows, but does not require, a type suffix.
|
||||
defm : NEONDTAnyInstAlias<"vswp${p}", "$Vd, $Vm",
|
||||
(VSWPd DPR:$Vd, DPR:$Vm, pred:$p)>;
|
||||
|
||||
@ -232,31 +232,37 @@
|
||||
@ CHECK: vorr q4, q7, q3 @ encoding: [0x56,0x81,0x2e,0xf2]
|
||||
|
||||
@ Two-operand aliases
|
||||
vand q6, q5
|
||||
vand.s8 q6, q5
|
||||
vand.s16 q7, q1
|
||||
vand.s32 q8, q2
|
||||
vand.f64 q8, q2
|
||||
|
||||
veor q6, q5
|
||||
veor.8 q6, q5
|
||||
veor.p16 q7, q1
|
||||
veor.u32 q8, q2
|
||||
veor.d q8, q2
|
||||
|
||||
veor q6, q5
|
||||
veor.i8 q6, q5
|
||||
veor.16 q7, q1
|
||||
veor.f q8, q2
|
||||
veor.i64 q8, q2
|
||||
|
||||
@ CHECK: vand q6, q6, q5 @ encoding: [0x5a,0xc1,0x0c,0xf2]
|
||||
@ CHECK: vand q6, q6, q5 @ encoding: [0x5a,0xc1,0x0c,0xf2]
|
||||
@ CHECK: vand q7, q7, q1 @ encoding: [0x52,0xe1,0x0e,0xf2]
|
||||
@ CHECK: vand q8, q8, q2 @ encoding: [0xd4,0x01,0x40,0xf2]
|
||||
@ CHECK: vand q8, q8, q2 @ encoding: [0xd4,0x01,0x40,0xf2]
|
||||
|
||||
@ CHECK: veor q6, q6, q5 @ encoding: [0x5a,0xc1,0x0c,0xf3]
|
||||
@ CHECK: veor q6, q6, q5 @ encoding: [0x5a,0xc1,0x0c,0xf3]
|
||||
@ CHECK: veor q7, q7, q1 @ encoding: [0x52,0xe1,0x0e,0xf3]
|
||||
@ CHECK: veor q8, q8, q2 @ encoding: [0xd4,0x01,0x40,0xf3]
|
||||
@ CHECK: veor q8, q8, q2 @ encoding: [0xd4,0x01,0x40,0xf3]
|
||||
|
||||
@ CHECK: veor q6, q6, q5 @ encoding: [0x5a,0xc1,0x0c,0xf3]
|
||||
@ CHECK: veor q6, q6, q5 @ encoding: [0x5a,0xc1,0x0c,0xf3]
|
||||
@ CHECK: veor q7, q7, q1 @ encoding: [0x52,0xe1,0x0e,0xf3]
|
||||
@ CHECK: veor q8, q8, q2 @ encoding: [0xd4,0x01,0x40,0xf3]
|
||||
|
||||
@ -158,3 +158,18 @@
|
||||
@ CHECK: vhsub.u8 q4, q4, q9 @ encoding: [0x62,0x82,0x08,0xf3]
|
||||
@ CHECK: vhsub.u16 q5, q5, q8 @ encoding: [0x60,0xa2,0x1a,0xf3]
|
||||
@ CHECK: vhsub.u32 q6, q6, q7 @ encoding: [0x4e,0xc2,0x2c,0xf3]
|
||||
|
||||
|
||||
vsubw.s8 q6, d5
|
||||
vsubw.s16 q7, d1
|
||||
vsubw.s32 q8, d2
|
||||
vsubw.u8 q6, d5
|
||||
vsubw.u16 q7, d1
|
||||
vsubw.u32 q8, d2
|
||||
|
||||
@ CHECK: vsubw.s8 q6, q6, d5 @ encoding: [0x05,0xc3,0x8c,0xf2]
|
||||
@ CHECK: vsubw.s16 q7, q7, d1 @ encoding: [0x01,0xe3,0x9e,0xf2]
|
||||
@ CHECK: vsubw.s32 q8, q8, d2 @ encoding: [0x82,0x03,0xe0,0xf2]
|
||||
@ CHECK: vsubw.u8 q6, q6, d5 @ encoding: [0x05,0xc3,0x8c,0xf3]
|
||||
@ CHECK: vsubw.u16 q7, q7, d1 @ encoding: [0x01,0xe3,0x9e,0xf3]
|
||||
@ CHECK: vsubw.u32 q8, q8, d2 @ encoding: [0x82,0x03,0xe0,0xf3]
|
||||
|
||||
Loading…
Reference in New Issue
Block a user