mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-16 14:31:59 +00:00
* Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds
- Support added for functions, basic blocks, constant pool, constants,
registers, and some basic support for globals, all untested
* Turn assert()s into abort()s so that unimplemented functions fail in release
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17143 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman
parent
3fd0e55de1
commit
d8e6e7f563
@ -10,10 +10,64 @@
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//
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//===----------------------------------------------------------------------===//
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#include "SparcV8.h"
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#include "SparcV8TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include <cstdlib>
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#include <map>
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#include <vector>
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namespace llvm {
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namespace {
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class SparcV8CodeEmitter : public MachineFunctionPass {
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TargetMachine &TM;
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MachineCodeEmitter &MCE;
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/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
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///
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int64_t getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
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// Tracks which instruction references which BasicBlock
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std::vector<std::pair<const BasicBlock*,
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std::pair<unsigned*,MachineInstr*> > > BBRefs;
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// Tracks where each BasicBlock starts
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std::map<const BasicBlock*, long> BBLocations;
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public:
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SparcV8CodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
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: TM(T), MCE(M) {}
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const char *getPassName() const { return "SparcV8 Machine Code Emitter"; }
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/// runOnMachineFunction - emits the given MachineFunction to memory
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///
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bool runOnMachineFunction(MachineFunction &MF);
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/// emitBasicBlock - emits the given MachineBasicBlock to memory
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///
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void emitBasicBlock(MachineBasicBlock &MBB);
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/// emitWord - write a 32-bit word to memory at the current PC
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///
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void emitWord(unsigned w) { MCE.emitWord(w); }
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/// getValueBit - return the particular bit of Val
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///
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unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
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/// getBinaryCodeForInstr - This function, generated by the
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/// CodeEmitterGenerator using TableGen, produces the binary encoding for
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/// machine instructions.
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///
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unsigned getBinaryCodeForInstr(MachineInstr &MI);
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};
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
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/// machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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@ -22,22 +76,135 @@ namespace llvm {
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///
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bool SparcV8TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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// Keep as `true' until this is a functional JIT to allow llvm-gcc to build
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return true;
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// It should go something like this:
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// PM.add(new Emitter(MCE)); // Machine code emitter pass for SparcV8
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// Delete machine code for this function after emitting it:
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// PM.add(createMachineCodeDeleter());
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// Machine code emitter pass for SparcV8
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PM.add(new SparcV8CodeEmitter(*this, MCE));
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// Delete machine code for this function after emitting it
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PM.add(createMachineCodeDeleter());
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return false;
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}
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bool SparcV8CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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MCE.startFunction(MF);
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MCE.emitConstantPool(MF.getConstantPool());
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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emitBasicBlock(*I);
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MCE.finishFunction(MF);
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// Resolve branches to BasicBlocks for the entire function
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for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
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long Location = BBLocations[BBRefs[i].first];
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unsigned *Ref = BBRefs[i].second.first;
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MachineInstr *MI = BBRefs[i].second.second;
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DEBUG(std::cerr << "Fixup @ " << std::hex << Ref << " to 0x" << Location
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<< " in instr: " << std::dec << *MI);
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for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
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MachineOperand &op = MI->getOperand(ii);
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if (op.isPCRelativeDisp()) {
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// the instruction's branch target is made such that it branches to
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// PC + (branchTarget * 4), so undo that arithmetic here:
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// Location is the target of the branch
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// Ref is the location of the instruction, and hence the PC
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int64_t branchTarget = (Location - (long)Ref) >> 2;
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MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed,
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branchTarget);
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unsigned fixedInstr = SparcV8CodeEmitter::getBinaryCodeForInstr(*MI);
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MCE.emitWordAt(fixedInstr, Ref);
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break;
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}
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}
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}
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BBRefs.clear();
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BBLocations.clear();
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return false;
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}
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void SparcV8CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
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emitWord(getBinaryCodeForInstr(*I));
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}
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int64_t SparcV8CodeEmitter::getMachineOpValue(MachineInstr &MI,
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MachineOperand &MO) {
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int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
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// or things that get fixed up later by the JIT.
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if (MO.isPCRelativeDisp()) {
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std::cerr << "SparcV8CodeEmitter: PC-relative disp unhandled\n";
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abort();
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} else if (MO.isRegister()) {
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rv = MO.getReg();
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} else if (MO.isImmediate()) {
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rv = MO.getImmedValue();
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} else if (MO.isGlobalAddress()) {
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GlobalValue *GV = MO.getGlobal();
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if (MO.isPCRelative()) { // Global variable reference
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if (void *Addr = (void*)(intptr_t)MCE.getGlobalValueAddress(GV)) {
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intptr_t CurrPC = MCE.getCurrentPCValue();
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return (int64_t) (((long)Addr - (long)CurrPC) >> 2);
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} else {
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std::cerr << "Unhandled pc-relative global value: " << GV << "\n";
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abort();
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}
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} else { // Function reference
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if (!(rv = (intptr_t)MCE.getGlobalValueAddress(GV))) {
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if (Function *F = dyn_cast<Function>(GV)) {
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std::cerr << "SparcV8CodeEmitter error: no lazy fn resolution yet!\n";
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abort();
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#if 0
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// Function has not yet been code generated!
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TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(),
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cast<Function>(GV));
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// Delayed resolution...
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return (intptr_t)TheJITResolver->getLazyResolver(cast<Function>(GV));
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#endif
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} else {
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std::cerr << "Unhandled global value: " << GV << "\n";
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abort();
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}
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}
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}
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} else if (MO.isMachineBasicBlock()) {
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const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
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unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
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BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
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} else if (MO.isExternalSymbol()) {
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} else if (MO.isConstantPoolIndex()) {
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unsigned index = MO.getConstantPoolIndex();
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rv = MCE.getConstantPoolEntryAddress(index);
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} else if (MO.isFrameIndex()) {
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std::cerr << "SparcV8CodeEmitter: error: Frame index unhandled!\n";
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abort();
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} else {
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std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
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abort();
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}
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// Adjust for special meaning of operands in some instructions
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unsigned Opcode = MI.getOpcode();
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if (Opcode == V8::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
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rv &= 0x03ff;
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} else if (Opcode == V8::ORri &&!MO.isRegister() &&!MO.isImmediate()) {
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rv = (rv >> 10) & 0x03fffff;
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}
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return rv;
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}
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void *SparcV8JITInfo::getJITStubForFunction(Function *F,
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MachineCodeEmitter &MCE) {
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assert (0 && "SparcV8JITInfo::getJITStubForFunction not implemented");
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std::cerr << "SparcV8JITInfo::getJITStubForFunction not implemented!\n";
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abort();
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return 0;
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}
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void SparcV8JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
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assert (0 && "SparcV8JITInfo::replaceMachineCodeForFunction not implemented");
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void SparcV8JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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std::cerr << "SparcV8JITInfo::replaceMachineCodeForFunction not implemented!";
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abort();
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}
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} // end llvm namespace
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#include "SparcV8GenCodeEmitter.inc"
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} // end llvm namespace
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@ -10,10 +10,64 @@
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//
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//===----------------------------------------------------------------------===//
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#include "SparcV8.h"
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#include "SparcV8TargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include <cstdlib>
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#include <map>
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#include <vector>
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namespace llvm {
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namespace {
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class SparcV8CodeEmitter : public MachineFunctionPass {
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TargetMachine &TM;
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MachineCodeEmitter &MCE;
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/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
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///
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int64_t getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
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// Tracks which instruction references which BasicBlock
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std::vector<std::pair<const BasicBlock*,
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std::pair<unsigned*,MachineInstr*> > > BBRefs;
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// Tracks where each BasicBlock starts
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std::map<const BasicBlock*, long> BBLocations;
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public:
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SparcV8CodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
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: TM(T), MCE(M) {}
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const char *getPassName() const { return "SparcV8 Machine Code Emitter"; }
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/// runOnMachineFunction - emits the given MachineFunction to memory
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///
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bool runOnMachineFunction(MachineFunction &MF);
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/// emitBasicBlock - emits the given MachineBasicBlock to memory
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///
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void emitBasicBlock(MachineBasicBlock &MBB);
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/// emitWord - write a 32-bit word to memory at the current PC
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///
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void emitWord(unsigned w) { MCE.emitWord(w); }
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/// getValueBit - return the particular bit of Val
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///
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unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
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/// getBinaryCodeForInstr - This function, generated by the
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/// CodeEmitterGenerator using TableGen, produces the binary encoding for
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/// machine instructions.
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///
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unsigned getBinaryCodeForInstr(MachineInstr &MI);
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};
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
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/// machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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@ -22,22 +76,135 @@ namespace llvm {
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///
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bool SparcV8TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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// Keep as `true' until this is a functional JIT to allow llvm-gcc to build
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return true;
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// It should go something like this:
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// PM.add(new Emitter(MCE)); // Machine code emitter pass for SparcV8
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// Delete machine code for this function after emitting it:
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// PM.add(createMachineCodeDeleter());
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// Machine code emitter pass for SparcV8
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PM.add(new SparcV8CodeEmitter(*this, MCE));
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// Delete machine code for this function after emitting it
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PM.add(createMachineCodeDeleter());
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return false;
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}
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bool SparcV8CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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MCE.startFunction(MF);
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MCE.emitConstantPool(MF.getConstantPool());
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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emitBasicBlock(*I);
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MCE.finishFunction(MF);
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// Resolve branches to BasicBlocks for the entire function
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for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
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long Location = BBLocations[BBRefs[i].first];
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unsigned *Ref = BBRefs[i].second.first;
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MachineInstr *MI = BBRefs[i].second.second;
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DEBUG(std::cerr << "Fixup @ " << std::hex << Ref << " to 0x" << Location
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<< " in instr: " << std::dec << *MI);
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for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
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MachineOperand &op = MI->getOperand(ii);
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if (op.isPCRelativeDisp()) {
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// the instruction's branch target is made such that it branches to
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// PC + (branchTarget * 4), so undo that arithmetic here:
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// Location is the target of the branch
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// Ref is the location of the instruction, and hence the PC
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int64_t branchTarget = (Location - (long)Ref) >> 2;
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MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed,
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branchTarget);
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unsigned fixedInstr = SparcV8CodeEmitter::getBinaryCodeForInstr(*MI);
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MCE.emitWordAt(fixedInstr, Ref);
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break;
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}
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}
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}
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BBRefs.clear();
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BBLocations.clear();
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return false;
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}
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void SparcV8CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
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emitWord(getBinaryCodeForInstr(*I));
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}
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int64_t SparcV8CodeEmitter::getMachineOpValue(MachineInstr &MI,
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MachineOperand &MO) {
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int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
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// or things that get fixed up later by the JIT.
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if (MO.isPCRelativeDisp()) {
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std::cerr << "SparcV8CodeEmitter: PC-relative disp unhandled\n";
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abort();
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} else if (MO.isRegister()) {
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rv = MO.getReg();
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} else if (MO.isImmediate()) {
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rv = MO.getImmedValue();
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} else if (MO.isGlobalAddress()) {
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GlobalValue *GV = MO.getGlobal();
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if (MO.isPCRelative()) { // Global variable reference
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if (void *Addr = (void*)(intptr_t)MCE.getGlobalValueAddress(GV)) {
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intptr_t CurrPC = MCE.getCurrentPCValue();
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return (int64_t) (((long)Addr - (long)CurrPC) >> 2);
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} else {
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std::cerr << "Unhandled pc-relative global value: " << GV << "\n";
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abort();
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}
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} else { // Function reference
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if (!(rv = (intptr_t)MCE.getGlobalValueAddress(GV))) {
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if (Function *F = dyn_cast<Function>(GV)) {
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std::cerr << "SparcV8CodeEmitter error: no lazy fn resolution yet!\n";
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abort();
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#if 0
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// Function has not yet been code generated!
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TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(),
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cast<Function>(GV));
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// Delayed resolution...
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return (intptr_t)TheJITResolver->getLazyResolver(cast<Function>(GV));
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#endif
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} else {
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std::cerr << "Unhandled global value: " << GV << "\n";
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abort();
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}
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}
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}
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} else if (MO.isMachineBasicBlock()) {
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const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
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unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
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BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
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} else if (MO.isExternalSymbol()) {
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} else if (MO.isConstantPoolIndex()) {
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unsigned index = MO.getConstantPoolIndex();
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rv = MCE.getConstantPoolEntryAddress(index);
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} else if (MO.isFrameIndex()) {
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std::cerr << "SparcV8CodeEmitter: error: Frame index unhandled!\n";
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abort();
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} else {
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std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
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abort();
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}
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// Adjust for special meaning of operands in some instructions
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unsigned Opcode = MI.getOpcode();
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if (Opcode == V8::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
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rv &= 0x03ff;
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} else if (Opcode == V8::ORri &&!MO.isRegister() &&!MO.isImmediate()) {
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rv = (rv >> 10) & 0x03fffff;
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}
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return rv;
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}
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void *SparcV8JITInfo::getJITStubForFunction(Function *F,
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MachineCodeEmitter &MCE) {
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assert (0 && "SparcV8JITInfo::getJITStubForFunction not implemented");
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std::cerr << "SparcV8JITInfo::getJITStubForFunction not implemented!\n";
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abort();
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return 0;
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}
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void SparcV8JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
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assert (0 && "SparcV8JITInfo::replaceMachineCodeForFunction not implemented");
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void SparcV8JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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std::cerr << "SparcV8JITInfo::replaceMachineCodeForFunction not implemented!";
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abort();
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}
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} // end llvm namespace
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#include "SparcV8GenCodeEmitter.inc"
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} // end llvm namespace
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