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R600/SI: Add pattern for bitcasting fp immediates to integers
The backend now assumes that all immediates are integers. This allows us to simplify immediate handling code, becasue we no longer need to handle fp and integer immediates differently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225844 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -130,7 +130,7 @@ static void foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,
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// Only one literal constant is allowed per instruction, so if src0 is a
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// literal constant then we can't do any folding.
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if ((Src0->isImm() || Src0->isFPImm()) && TII->isLiteralConstant(*Src0))
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if (Src0->isImm() && TII->isLiteralConstant(*Src0))
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return;
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@@ -151,12 +151,6 @@ static void foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,
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if (MovSrc.isImm() && isUInt<32>(MovSrc.getImm())) {
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Src0->ChangeToImmediate(MovSrc.getImm());
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ConstantFolded = true;
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} else if (MovSrc.isFPImm()) {
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const ConstantFP *CFP = MovSrc.getFPImm();
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if (&CFP->getValueAPF().getSemantics() == &APFloat::IEEEsingle) {
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Src0->ChangeToFPImmediate(CFP);
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ConstantFolded = true;
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}
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}
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if (ConstantFolded) {
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if (MRI.use_empty(Reg))
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@@ -193,7 +187,6 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
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if (MI.getOpcode() == AMDGPU::S_MOV_B32) {
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const MachineOperand &Src = MI.getOperand(1);
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// TODO: Handle FPImm?
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if (Src.isImm()) {
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if (isInt<16>(Src.getImm()) && !TII->isInlineConstant(Src))
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MI.setDesc(TII->get(AMDGPU::S_MOVK_I32));
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