mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-10 02:36:06 +00:00
eliminate temporary vectors created during X86 lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34577 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -815,9 +815,8 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
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Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
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std::vector<MVT::ValueType> NodeTys;
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NodeTys.push_back(MVT::Other); // Returns a chain
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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// Returns a chain & a flag for retval copy to use.
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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@ -856,10 +855,10 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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NumBytesForCalleeToPush = NumSRetBytes;
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}
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NodeTys.clear();
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NodeTys.push_back(MVT::Other); // Returns a chain
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if (RetVT != MVT::Other)
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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else
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NodeTys = DAG.getVTList(MVT::Other);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getConstant(NumBytes, getPointerTy()));
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@ -870,19 +869,18 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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InFlag = Chain.getValue(1);
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std::vector<SDOperand> ResultVals;
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NodeTys.clear();
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switch (RetVT) {
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default: assert(0 && "Unknown value type to return!");
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case MVT::Other: break;
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case MVT::i8:
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Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i8);
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NodeTys = DAG.getVTList(MVT::i8, MVT::Other);
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break;
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case MVT::i16:
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Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i16);
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NodeTys = DAG.getVTList(MVT::i16, MVT::Other);
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break;
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case MVT::i32:
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if (Op.Val->getValueType(1) == MVT::i32) {
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@ -891,12 +889,12 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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Chain = DAG.getCopyFromReg(Chain, X86::EDX, MVT::i32,
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Chain.getValue(2)).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i32);
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NodeTys = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other);
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} else {
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Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys = DAG.getVTList(MVT::i32, MVT::Other);
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}
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NodeTys.push_back(MVT::i32);
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break;
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case MVT::v16i8:
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case MVT::v8i16:
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@ -907,7 +905,7 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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assert(!isStdCall && "Unknown value type to return!");
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Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(RetVT);
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NodeTys = DAG.getVTList(RetVT, MVT::Other);
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break;
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case MVT::f32:
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case MVT::f64: {
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@ -947,7 +945,7 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// operation is okay to eliminate if we allow excess FP precision.
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RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal);
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ResultVals.push_back(RetVal);
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NodeTys.push_back(RetVT);
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NodeTys = DAG.getVTList(RetVT, MVT::Other);
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break;
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}
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}
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@ -957,7 +955,6 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG,
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return Chain;
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// Otherwise, merge everything together with a MERGE_VALUES node.
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NodeTys.push_back(MVT::Other);
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ResultVals.push_back(Chain);
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SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys,
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&ResultVals[0], ResultVals.size());
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@ -1367,9 +1364,8 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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} else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
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Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy());
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std::vector<MVT::ValueType> NodeTys;
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NodeTys.push_back(MVT::Other); // Returns a chain
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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// Returns a chain & a flag for retval copy to use.
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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@ -1388,10 +1384,11 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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NodeTys, &Ops[0], Ops.size());
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InFlag = Chain.getValue(1);
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NodeTys.clear();
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NodeTys.push_back(MVT::Other); // Returns a chain
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if (RetVT != MVT::Other)
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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// Returns a flag for retval copy to use.
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NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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else
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NodeTys = DAG.getVTList(MVT::Other);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getConstant(NumBytes, getPointerTy()));
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@ -1402,24 +1399,23 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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InFlag = Chain.getValue(1);
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std::vector<SDOperand> ResultVals;
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NodeTys.clear();
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switch (RetVT) {
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default: assert(0 && "Unknown value type to return!");
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case MVT::Other: break;
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case MVT::i8:
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Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i8);
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NodeTys = DAG.getVTList(MVT::i8, MVT::Other);
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break;
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case MVT::i16:
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Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i16);
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NodeTys = DAG.getVTList(MVT::i16, MVT::Other);
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break;
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case MVT::i32:
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Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i32);
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NodeTys = DAG.getVTList(MVT::i32, MVT::Other);
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break;
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case MVT::i64:
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if (Op.Val->getValueType(1) == MVT::i64) {
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@ -1429,12 +1425,12 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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Chain = DAG.getCopyFromReg(Chain, X86::RDX, MVT::i64,
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Chain.getValue(2)).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i64);
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NodeTys = DAG.getVTList(MVT::i64, MVT::i64, MVT::Other);
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} else {
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Chain = DAG.getCopyFromReg(Chain, X86::RAX, MVT::i64, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys = DAG.getVTList(MVT::i64, MVT::Other);
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}
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NodeTys.push_back(MVT::i64);
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break;
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case MVT::f32:
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case MVT::f64:
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@ -1447,7 +1443,7 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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// FIXME: long double support?
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Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(RetVT);
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NodeTys = DAG.getVTList(RetVT, MVT::Other);
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break;
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}
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@ -1456,7 +1452,6 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
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return Chain;
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// Otherwise, merge everything together with a MERGE_VALUES node.
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NodeTys.push_back(MVT::Other);
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ResultVals.push_back(Chain);
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SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys,
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&ResultVals[0], ResultVals.size());
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@ -1805,9 +1800,8 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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InFlag = Chain.getValue(1);
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}
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std::vector<MVT::ValueType> NodeTys;
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NodeTys.push_back(MVT::Other); // Returns a chain
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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// Returns a chain & a flag for retval copy to use.
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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@ -1831,10 +1825,11 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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NodeTys, &Ops[0], Ops.size());
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InFlag = Chain.getValue(1);
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NodeTys.clear();
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NodeTys.push_back(MVT::Other); // Returns a chain
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if (RetVT != MVT::Other)
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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// Returns a flag for retval copy to use.
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NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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else
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NodeTys = DAG.getVTList(MVT::Other);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getConstant(NumBytes, getPointerTy()));
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@ -1845,19 +1840,18 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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InFlag = Chain.getValue(1);
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std::vector<SDOperand> ResultVals;
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NodeTys.clear();
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switch (RetVT) {
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default: assert(0 && "Unknown value type to return!");
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case MVT::Other: break;
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case MVT::i8:
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Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i8);
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NodeTys = DAG.getVTList(MVT::i8, MVT::Other);
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break;
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case MVT::i16:
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Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i16);
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NodeTys = DAG.getVTList(MVT::i16, MVT::Other);
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break;
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case MVT::i32:
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if (Op.Val->getValueType(1) == MVT::i32) {
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@ -1866,12 +1860,12 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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Chain = DAG.getCopyFromReg(Chain, X86::EDX, MVT::i32,
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Chain.getValue(2)).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i32);
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NodeTys = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other);
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} else {
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Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys = DAG.getVTList(MVT::i32, MVT::Other);
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}
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NodeTys.push_back(MVT::i32);
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break;
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case MVT::v16i8:
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case MVT::v8i16:
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@ -1884,7 +1878,7 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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} else {
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Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(RetVT);
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NodeTys = DAG.getVTList(RetVT, MVT::Other);
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}
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break;
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case MVT::f32:
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@ -1925,7 +1919,8 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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// operation is okay to eliminate if we allow excess FP precision.
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RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal);
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ResultVals.push_back(RetVal);
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NodeTys.push_back(RetVT);
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NodeTys = DAG.getVTList(RetVT, MVT::Other);
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break;
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}
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}
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@ -1936,7 +1931,6 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
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return Chain;
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// Otherwise, merge everything together with a MERGE_VALUES node.
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NodeTys.push_back(MVT::Other);
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ResultVals.push_back(Chain);
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SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys,
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&ResultVals[0], ResultVals.size());
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@ -3771,9 +3765,7 @@ SDOperand X86TargetLowering::LowerFCOPYSIGN(SDOperand Op, SelectionDAG &DAG) {
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}
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Constant *CS = ConstantStruct::get(CV);
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SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4);
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std::vector<MVT::ValueType> Tys;
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Tys.push_back(SrcVT);
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Tys.push_back(MVT::Other);
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SDVTList Tys = DAG.getVTList(SrcVT, MVT::Other);
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SmallVector<SDOperand, 3> Ops;
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Ops.push_back(DAG.getEntryNode());
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Ops.push_back(CPIdx);
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@ -3805,9 +3797,7 @@ SDOperand X86TargetLowering::LowerFCOPYSIGN(SDOperand Op, SelectionDAG &DAG) {
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}
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CS = ConstantStruct::get(CV);
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CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4);
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Tys.clear();
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Tys.push_back(VT);
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Tys.push_back(MVT::Other);
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Tys = DAG.getVTList(VT, MVT::Other);
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Ops.clear();
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Ops.push_back(DAG.getEntryNode());
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Ops.push_back(CPIdx);
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@ -4202,9 +4192,7 @@ SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) {
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Op.getOperand(1), InFlag);
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InFlag = Chain.getValue(1);
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std::vector<MVT::ValueType> Tys;
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Tys.push_back(MVT::Other);
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Tys.push_back(MVT::Flag);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(AVT));
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@ -4220,9 +4208,7 @@ SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) {
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Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX,
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Left, InFlag);
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InFlag = Chain.getValue(1);
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Tys.clear();
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Tys.push_back(MVT::Other);
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Tys.push_back(MVT::Flag);
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Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(MVT::i8));
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@ -4338,9 +4324,7 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
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Op.getOperand(2), InFlag);
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InFlag = Chain.getValue(1);
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std::vector<MVT::ValueType> Tys;
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Tys.push_back(MVT::Other);
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Tys.push_back(MVT::Flag);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(AVT));
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@ -4356,9 +4340,7 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
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Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX,
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Left, InFlag);
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InFlag = Chain.getValue(1);
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Tys.clear();
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Tys.push_back(MVT::Other);
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Tys.push_back(MVT::Flag);
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Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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Ops.clear();
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Ops.push_back(Chain);
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Ops.push_back(DAG.getValueType(MVT::i8));
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@ -4417,9 +4399,7 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
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SDOperand
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X86TargetLowering::LowerREADCYCLCECOUNTER(SDOperand Op, SelectionDAG &DAG) {
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std::vector<MVT::ValueType> Tys;
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Tys.push_back(MVT::Other);
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Tys.push_back(MVT::Flag);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
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std::vector<SDOperand> Ops;
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Ops.push_back(Op.getOperand(0));
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SDOperand rd = DAG.getNode(X86ISD::RDTSC_DAG, Tys, &Ops[0], Ops.size());
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@ -4432,8 +4412,8 @@ X86TargetLowering::LowerREADCYCLCECOUNTER(SDOperand Op, SelectionDAG &DAG) {
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DAG.getConstant(32, MVT::i8));
|
||||
Ops.push_back(DAG.getNode(ISD::OR, MVT::i64, Copy1, Tmp));
|
||||
Ops.push_back(Copy2.getValue(1));
|
||||
Tys[0] = MVT::i64;
|
||||
Tys[1] = MVT::Other;
|
||||
|
||||
Tys = DAG.getVTList(MVT::i64, MVT::Other);
|
||||
} else {
|
||||
SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::EAX, MVT::i32, rd.getValue(1));
|
||||
SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::EDX,
|
||||
@ -4441,8 +4421,7 @@ X86TargetLowering::LowerREADCYCLCECOUNTER(SDOperand Op, SelectionDAG &DAG) {
|
||||
Ops.push_back(Copy1);
|
||||
Ops.push_back(Copy2);
|
||||
Ops.push_back(Copy2.getValue(1));
|
||||
Tys[0] = Tys[1] = MVT::i32;
|
||||
Tys.push_back(MVT::Other);
|
||||
Tys = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other);
|
||||
}
|
||||
return DAG.getNode(ISD::MERGE_VALUES, Tys, &Ops[0], Ops.size());
|
||||
}
|
||||
@ -5058,9 +5037,7 @@ static SDOperand PerformShuffleCombine(SDNode *N, SelectionDAG &DAG,
|
||||
LD->getSrcValueOffset());
|
||||
} else {
|
||||
// Just use movups, it's shorter.
|
||||
std::vector<MVT::ValueType> Tys;
|
||||
Tys.push_back(MVT::v4f32);
|
||||
Tys.push_back(MVT::Other);
|
||||
SDVTList Tys = DAG.getVTList(MVT::v4f32, MVT::Other);
|
||||
SmallVector<SDOperand, 3> Ops;
|
||||
Ops.push_back(Base->getOperand(0));
|
||||
Ops.push_back(Base->getOperand(1));
|
||||
|
Loading…
x
Reference in New Issue
Block a user