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Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44921 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-12-12 06:45:40 +00:00
parent 621deadee8
commit db2d524d5f
2 changed files with 26 additions and 17 deletions
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30
lib/Target/X86/X86ISelLowering.cpp
View File

@ -3157,21 +3157,21 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
unsigned NumZero = 0;
unsigned NumNonZero = 0;
unsigned NonZeros = 0;
unsigned NumNonZeroImms = 0;
bool HasNonImms = false;
SmallSet<SDOperand, 8> Values;
for (unsigned i = 0; i < NumElems; ++i) {
SDOperand Elt = Op.getOperand(i);
if (Elt.getOpcode() != ISD::UNDEF) {
Values.insert(Elt);
if (isZeroNode(Elt))
NumZero++;
else {
NonZeros |= (1 << i);
NumNonZero++;
if (Elt.getOpcode() == ISD::Constant ||
Elt.getOpcode() == ISD::ConstantFP)
NumNonZeroImms++;
}
if (Elt.getOpcode() == ISD::UNDEF)
continue;
Values.insert(Elt);
if (Elt.getOpcode() != ISD::Constant &&
Elt.getOpcode() != ISD::ConstantFP)
HasNonImms = true;
if (isZeroNode(Elt))
NumZero++;
else {
NonZeros |= (1 << i);
NumNonZero++;
}
}
@ -3185,7 +3185,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
return SDOperand();
// Special case for single non-zero element.
if (NumNonZero == 1) {
if (NumNonZero == 1 && NumElems <= 4) {
unsigned Idx = CountTrailingZeros_32(NonZeros);
SDOperand Item = Op.getOperand(Idx);
Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item);
@ -3193,6 +3193,8 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
// Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector.
return getShuffleVectorZeroOrUndef(Item, VT, NumElems, Idx,
NumZero > 0, DAG);
else if (!HasNonImms) // Otherwise, it's better to do a constpool load.
return SDOperand();
if (EVTBits == 32) {
// Turn it into a shuffle of zero and zero-extended scalar to vector.
@ -3212,7 +3214,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) {
// A vector full of immediates; various special cases are already
// handled, so this is best done with a single constant-pool load.
if (NumNonZero == NumNonZeroImms)
if (!HasNonImms)
return SDOperand();
// Let legalizer expand 2-wide build_vectors.

13
test/CodeGen/X86/vec_return.ll
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@ -1,5 +1,12 @@
; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mcpu=yonah
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xorps | count 1
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movaps | count 1
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep shuf
<2 x double> %test() {
ret <2 x double> <double 0.0, double 0.0>
define <2 x double> @test() {
ret <2 x double> zeroinitializer
}
define <4 x i32> @test2() nounwind {
ret <4 x i32> < i32 0, i32 0, i32 1, i32 0 >
}