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Teach getVectorTypeBreakdown about promotion of vectors in addition to widening of vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -940,9 +940,12 @@ unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
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unsigned NumElts = VT.getVectorNumElements();
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// If there is a wider vector type with the same element type as this one,
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// we should widen to that legal vector type. This handles things like
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// <2 x float> -> <4 x float>.
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if (NumElts != 1 && getTypeAction(Context, VT) == TypeWidenVector) {
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// or a promoted vector type that has the same number of elements which
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// are wider, then we should convert to that legal vector type.
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// This handles things like <2 x float> -> <4 x float> and
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// <4 x i1> -> <4 x i32>.
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LegalizeTypeAction TA = getTypeAction(Context, VT);
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if (NumElts != 1 && (TA == TypeWidenVector || TA == TypePromoteInteger)) {
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RegisterVT = getTypeToTransformTo(Context, VT);
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if (isTypeLegal(RegisterVT)) {
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IntermediateVT = RegisterVT;
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21
test/CodeGen/X86/2011-04-19-sclr-bb.ll
Normal file
21
test/CodeGen/X86/2011-04-19-sclr-bb.ll
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@ -0,0 +1,21 @@
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
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; Make sure that values of illegal types are not scalarized between basic blocks.
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;CHECK: test
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;CHECK-NOT: pinsrw
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;CHECK-NOT: pextrb
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;CHECK: ret
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define void @test(i1 %cond) {
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ENTRY:
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br label %LOOP
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LOOP:
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%vec1 = phi <4 x i1> [ %vec1_or_2, %LOOP ], [ zeroinitializer, %ENTRY ]
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%vec2 = phi <4 x i1> [ %vec2_and_1, %LOOP ], [ zeroinitializer, %ENTRY ]
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%vec1_or_2 = or <4 x i1> %vec1, %vec2
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%vec2_and_1 = and <4 x i1> %vec2, %vec1
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br i1 %cond, label %LOOP, label %EXIT
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EXIT:
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ret void
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}
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