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remove some bits that are not yet meant to land.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33666 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1355,63 +1355,6 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, uint64_t DemandedElts,
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break;
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}
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case Instruction::BitCast: {
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// packed->packed
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const PackedType *PTy = dyn_cast<PackedType>(I->getOperand(0)->getType());
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if (!PTy) break;
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unsigned InVWidth = PTy->getNumElements();
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uint64_t InputDemandedElts = 0;
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unsigned Ratio;
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if (VWidth == InVWidth) {
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Ratio = 1;
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InputDemandedElts = DemandedElts;
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} else if (VWidth > InVWidth) {
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// If there are more elements in the result than there are in the source,
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// then an input element is live if any of the corresponding output
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// elements are live.
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Ratio = VWidth/InVWidth;
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for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx) {
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if (DemandedElts & (1ULL << OutIdx))
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InputDemandedElts |= 1ULL << (OutIdx/Ratio);
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}
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} else {
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// If there are more elements in the source than there are in the result,
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// then an input element is live if the corresponding output element is
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// live.
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Ratio = InVWidth/VWidth;
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for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
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if (DemandedElts & (1ULL << InIdx/Ratio))
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InputDemandedElts |= 1ULL << InIdx;
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}
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// div/rem demand all inputs, because they don't want divide by zero.
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TmpV = SimplifyDemandedVectorElts(I->getOperand(0), InputDemandedElts,
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UndefElts2, Depth+1);
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if (TmpV) {
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I->setOperand(0, TmpV);
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MadeChange = true;
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}
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UndefElts = UndefElts2;
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if (VWidth > InVWidth) {
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// If there are more elements in the result than there are in the source,
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// then an output element is undef if the corresponding input element is
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// undef.
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for (unsigned OutIdx = 0; OutIdx != VWidth; ++OutIdx)
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if (UndefElts2 & (1ULL << (OutIdx/Ratio)))
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UndefElts |= 1ULL << OutIdx;
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} else if (VWidth < InVWidth) {
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// If there are more elements in the source than there are in the result,
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// then a result element is undef if all of the corresponding input
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// elements are undef.
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UndefElts = ~0ULL >> (64-VWidth); // Start out all undef.
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for (unsigned InIdx = 0; InIdx != InVWidth; ++InIdx)
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if ((UndefElts2 & (1ULL << InIdx)) == 0) // Not undef?
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UndefElts &= ~(1ULL << (InIdx/Ratio)); // Clear undef bit.
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}
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break;
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}
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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