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https://github.com/c64scene-ar/llvm-6502.git
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MC: Modernize MCOperand API naming. NFC.
MCOperand::Create*() methods renamed to MCOperand::create*(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237275 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -52,7 +52,7 @@ static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo,
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RegNo = Regs[RegNo];
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if (RegNo == 0)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::CreateReg(RegNo));
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Inst.addOperand(MCOperand::createReg(RegNo));
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return MCDisassembler::Success;
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}
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@@ -126,7 +126,7 @@ template<unsigned N>
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static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) {
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if (!isUInt<N>(Imm))
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::CreateImm(Imm));
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Inst.addOperand(MCOperand::createImm(Imm));
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return MCDisassembler::Success;
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}
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@@ -134,7 +134,7 @@ template<unsigned N>
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static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm) {
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if (!isUInt<N>(Imm))
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm)));
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Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm)));
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return MCDisassembler::Success;
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}
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@@ -208,7 +208,7 @@ template<unsigned N>
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static DecodeStatus decodePCDBLOperand(MCInst &Inst, uint64_t Imm,
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uint64_t Address) {
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assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
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Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address));
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Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) * 2 + Address));
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return MCDisassembler::Success;
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}
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@@ -229,8 +229,8 @@ static DecodeStatus decodeBDAddr12Operand(MCInst &Inst, uint64_t Field,
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uint64_t Base = Field >> 12;
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uint64_t Disp = Field & 0xfff;
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assert(Base < 16 && "Invalid BDAddr12");
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Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::CreateImm(Disp));
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Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::createImm(Disp));
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return MCDisassembler::Success;
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}
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@@ -239,8 +239,8 @@ static DecodeStatus decodeBDAddr20Operand(MCInst &Inst, uint64_t Field,
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uint64_t Base = Field >> 20;
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uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff);
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assert(Base < 16 && "Invalid BDAddr20");
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Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
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Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp)));
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return MCDisassembler::Success;
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}
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@@ -250,9 +250,9 @@ static DecodeStatus decodeBDXAddr12Operand(MCInst &Inst, uint64_t Field,
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uint64_t Base = (Field >> 12) & 0xf;
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uint64_t Disp = Field & 0xfff;
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assert(Index < 16 && "Invalid BDXAddr12");
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Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::CreateImm(Disp));
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Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
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Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::createImm(Disp));
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Inst.addOperand(MCOperand::createReg(Index == 0 ? 0 : Regs[Index]));
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return MCDisassembler::Success;
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}
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@@ -262,9 +262,9 @@ static DecodeStatus decodeBDXAddr20Operand(MCInst &Inst, uint64_t Field,
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uint64_t Base = (Field >> 20) & 0xf;
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uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12);
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assert(Index < 16 && "Invalid BDXAddr20");
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Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
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Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
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Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp)));
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Inst.addOperand(MCOperand::createReg(Index == 0 ? 0 : Regs[Index]));
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return MCDisassembler::Success;
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}
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@@ -274,9 +274,9 @@ static DecodeStatus decodeBDLAddr12Len8Operand(MCInst &Inst, uint64_t Field,
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uint64_t Base = (Field >> 12) & 0xf;
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uint64_t Disp = Field & 0xfff;
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assert(Length < 256 && "Invalid BDLAddr12Len8");
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Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::CreateImm(Disp));
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Inst.addOperand(MCOperand::CreateImm(Length + 1));
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Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::createImm(Disp));
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Inst.addOperand(MCOperand::createImm(Length + 1));
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return MCDisassembler::Success;
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}
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@@ -286,9 +286,9 @@ static DecodeStatus decodeBDVAddr12Operand(MCInst &Inst, uint64_t Field,
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uint64_t Base = (Field >> 12) & 0xf;
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uint64_t Disp = Field & 0xfff;
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assert(Index < 32 && "Invalid BDVAddr12");
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Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::CreateImm(Disp));
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Inst.addOperand(MCOperand::CreateReg(SystemZMC::VR128Regs[Index]));
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Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base]));
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Inst.addOperand(MCOperand::createImm(Disp));
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Inst.addOperand(MCOperand::createReg(SystemZMC::VR128Regs[Index]));
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return MCDisassembler::Success;
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}
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