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Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108304 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-07-14 01:22:19 +00:00
parent 9e82bf12a0
commit db89809037
4 changed files with 47 additions and 22 deletions
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54
lib/CodeGen/ProcessImplicitDefs.cpp
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@ -41,21 +41,51 @@ void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
}
bool ProcessImplicitDefs::CanTurnIntoImplicitDef(MachineInstr *MI,
unsigned Reg, unsigned OpIdx,
const TargetInstrInfo *tii_) {
bool
ProcessImplicitDefs::CanTurnIntoImplicitDef(MachineInstr *MI,
unsigned Reg, unsigned OpIdx,
const TargetInstrInfo *tii_,
SmallSet<unsigned, 8> &ImpDefRegs) {
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
Reg == SrcReg && DstSubReg == 0)
Reg == SrcReg &&
(DstSubReg == 0 || ImpDefRegs.count(DstReg)))
return true;
switch(OpIdx) {
case 1: return MI->isCopy() && MI->getOperand(0).getSubReg() == 0;
case 2: return MI->isSubregToReg() && MI->getOperand(0).getSubReg() == 0;
default: return false;
case 1:
return MI->isCopy() && (MI->getOperand(0).getSubReg() == 0 ||
ImpDefRegs.count(MI->getOperand(0).getReg()));
case 2:
return MI->isSubregToReg() && (MI->getOperand(0).getSubReg() == 0 ||
ImpDefRegs.count(MI->getOperand(0).getReg()));
default: return false;
}
}
static bool isUndefCopy(MachineInstr *MI, unsigned Reg,
const TargetInstrInfo *tii_,
SmallSet<unsigned, 8> &ImpDefRegs) {
if (MI->isCopy()) {
MachineOperand &MO0 = MI->getOperand(0);
MachineOperand &MO1 = MI->getOperand(1);
if (MO1.getReg() != Reg)
return false;
if (!MO0.getSubReg() || ImpDefRegs.count(MO0.getReg()))
return true;
return false;
}
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg)) {
if (Reg != SrcReg)
return false;
if (DstSubReg == 0 || ImpDefRegs.count(DstReg))
return true;
}
return false;
}
/// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure
/// there is one implicit_def for each use. Add isUndef marker to
/// implicit_def defs and their uses.
@ -104,7 +134,7 @@ bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &fn) {
// Eliminate %reg1032:sub<def> = COPY undef.
if (MI->isCopy() && MI->getOperand(0).getSubReg()) {
MachineOperand &MO = MI->getOperand(1);
if (ImpDefRegs.count(MO.getReg())) {
if (MO.isUndef() || ImpDefRegs.count(MO.getReg())) {
if (MO.isKill()) {
LiveVariables::VarInfo& vi = lv_->getVarInfo(MO.getReg());
vi.removeKill(MI);
@ -126,7 +156,7 @@ bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &fn) {
if (!ImpDefRegs.count(Reg))
continue;
// Use is a copy, just turn it into an implicit_def.
if (CanTurnIntoImplicitDef(MI, Reg, i, tii_)) {
if (CanTurnIntoImplicitDef(MI, Reg, i, tii_, ImpDefRegs)) {
bool isKill = MO.isKill();
MI->setDesc(tii_->get(TargetOpcode::IMPLICIT_DEF));
for (int j = MI->getNumOperands() - 1, ee = 0; j > ee; --j)
@ -223,11 +253,7 @@ bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &fn) {
MachineInstr *RMI = RUses[i];
// Turn a copy use into an implicit_def.
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
if ((RMI->isCopy() && RMI->getOperand(1).getReg() == Reg &&
RMI->getOperand(0).getSubReg() == 0) ||
(tii_->isMoveInstr(*RMI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
Reg == SrcReg && DstSubReg == 0)) {
if (isUndefCopy(RMI, Reg, tii_, ImpDefRegs)) {
RMI->setDesc(tii_->get(TargetOpcode::IMPLICIT_DEF));
bool isKill = false;