Add support for referencing global variables/functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4907 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2002-12-04 06:45:19 +00:00
parent b72d221d61
commit dbf30f7b02
6 changed files with 48 additions and 8 deletions

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@ -133,8 +133,14 @@ namespace {
// If this operand is a constant, emit the code to copy the constant into // If this operand is a constant, emit the code to copy the constant into
// the register here... // the register here...
// //
if (Constant *C = dyn_cast<Constant>(V)) if (Constant *C = dyn_cast<Constant>(V)) {
copyConstantToRegister(C, Reg); copyConstantToRegister(C, Reg);
} else if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// Move the address of the global into the register
BuildMI(BB, X86::MOVir32, 1, Reg).addReg(GV);
} else {
assert(0 && "Don't know how to handle a value of this type!");
}
return Reg; return Reg;
} }

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@ -11,6 +11,7 @@
#include "llvm/CodeGen/MachineCodeEmitter.h" #include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Value.h"
namespace { namespace {
class Emitter : public FunctionPass { class Emitter : public FunctionPass {
@ -224,8 +225,13 @@ void Emitter::emitInstruction(MachineInstr &MI) {
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg())); MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
if (MI.getNumOperands() == 2) { if (MI.getNumOperands() == 2) {
unsigned Size = 4; unsigned Size = 4;
if (Value *V = MI.getOperand(1).getVRegValue()) {
assert(Size == 4 && "Don't know how to emit non-pointer values!");
MCE.emitGlobalAddress(cast<GlobalValue>(V));
} else {
emitConstant(MI.getOperand(1).getImmedValue(), Size); emitConstant(MI.getOperand(1).getImmedValue(), Size);
} }
}
break; break;
case X86II::MRMDestReg: case X86II::MRMDestReg:
MCE.emitByte(BaseOpcode); MCE.emitByte(BaseOpcode);

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@ -96,6 +96,10 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
const MRegisterInfo &RI) { const MRegisterInfo &RI) {
switch (MO.getType()) { switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister: case MachineOperand::MO_VirtualRegister:
if (Value *V = MO.getVRegValue()) {
O << "<" << V->getName() << ">";
return;
}
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
if (MO.getReg() < MRegisterInfo::FirstVirtualRegister) if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
O << RI.get(MO.getReg()).Name; O << RI.get(MO.getReg()).Name;
@ -172,11 +176,15 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
// There are currently two forms of acceptable AddRegFrm instructions. // There are currently two forms of acceptable AddRegFrm instructions.
// Either the instruction JUST takes a single register (like inc, dec, etc), // Either the instruction JUST takes a single register (like inc, dec, etc),
// or it takes a register and an immediate of the same size as the register // or it takes a register and an immediate of the same size as the register
// (move immediate f.e.). // (move immediate f.e.). Note that this immediate value might be stored as
// an LLVM value, to represent, for example, loading the address of a global
// into a register.
// //
assert(isReg(MI->getOperand(0)) && assert(isReg(MI->getOperand(0)) &&
(MI->getNumOperands() == 1 || (MI->getNumOperands() == 1 ||
(MI->getNumOperands() == 2 && isImmediate(MI->getOperand(1)))) && (MI->getNumOperands() == 2 &&
(MI->getOperand(1).getVRegValue() ||
isImmediate(MI->getOperand(1))))) &&
"Illegal form for AddRegFrm instruction!"); "Illegal form for AddRegFrm instruction!");
unsigned Reg = MI->getOperand(0).getReg(); unsigned Reg = MI->getOperand(0).getReg();

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@ -96,6 +96,10 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
const MRegisterInfo &RI) { const MRegisterInfo &RI) {
switch (MO.getType()) { switch (MO.getType()) {
case MachineOperand::MO_VirtualRegister: case MachineOperand::MO_VirtualRegister:
if (Value *V = MO.getVRegValue()) {
O << "<" << V->getName() << ">";
return;
}
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
if (MO.getReg() < MRegisterInfo::FirstVirtualRegister) if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
O << RI.get(MO.getReg()).Name; O << RI.get(MO.getReg()).Name;
@ -172,11 +176,15 @@ void X86InstrInfo::print(const MachineInstr *MI, std::ostream &O,
// There are currently two forms of acceptable AddRegFrm instructions. // There are currently two forms of acceptable AddRegFrm instructions.
// Either the instruction JUST takes a single register (like inc, dec, etc), // Either the instruction JUST takes a single register (like inc, dec, etc),
// or it takes a register and an immediate of the same size as the register // or it takes a register and an immediate of the same size as the register
// (move immediate f.e.). // (move immediate f.e.). Note that this immediate value might be stored as
// an LLVM value, to represent, for example, loading the address of a global
// into a register.
// //
assert(isReg(MI->getOperand(0)) && assert(isReg(MI->getOperand(0)) &&
(MI->getNumOperands() == 1 || (MI->getNumOperands() == 1 ||
(MI->getNumOperands() == 2 && isImmediate(MI->getOperand(1)))) && (MI->getNumOperands() == 2 &&
(MI->getOperand(1).getVRegValue() ||
isImmediate(MI->getOperand(1))))) &&
"Illegal form for AddRegFrm instruction!"); "Illegal form for AddRegFrm instruction!");
unsigned Reg = MI->getOperand(0).getReg(); unsigned Reg = MI->getOperand(0).getReg();

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@ -11,6 +11,7 @@
#include "llvm/CodeGen/MachineCodeEmitter.h" #include "llvm/CodeGen/MachineCodeEmitter.h"
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Value.h"
namespace { namespace {
class Emitter : public FunctionPass { class Emitter : public FunctionPass {
@ -224,8 +225,13 @@ void Emitter::emitInstruction(MachineInstr &MI) {
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg())); MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
if (MI.getNumOperands() == 2) { if (MI.getNumOperands() == 2) {
unsigned Size = 4; unsigned Size = 4;
if (Value *V = MI.getOperand(1).getVRegValue()) {
assert(Size == 4 && "Don't know how to emit non-pointer values!");
MCE.emitGlobalAddress(cast<GlobalValue>(V));
} else {
emitConstant(MI.getOperand(1).getImmedValue(), Size); emitConstant(MI.getOperand(1).getImmedValue(), Size);
} }
}
break; break;
case X86II::MRMDestReg: case X86II::MRMDestReg:
MCE.emitByte(BaseOpcode); MCE.emitByte(BaseOpcode);

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@ -133,8 +133,14 @@ namespace {
// If this operand is a constant, emit the code to copy the constant into // If this operand is a constant, emit the code to copy the constant into
// the register here... // the register here...
// //
if (Constant *C = dyn_cast<Constant>(V)) if (Constant *C = dyn_cast<Constant>(V)) {
copyConstantToRegister(C, Reg); copyConstantToRegister(C, Reg);
} else if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// Move the address of the global into the register
BuildMI(BB, X86::MOVir32, 1, Reg).addReg(GV);
} else {
assert(0 && "Don't know how to handle a value of this type!");
}
return Reg; return Reg;
} }