From dbf5f2557e5daa89e51d59b0da3329b58c84e4cc Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 21 Jan 2009 23:40:54 +0000 Subject: [PATCH] Recognize inline asm for bswap on x86-64 GLIBC. This allows it to be supported in the JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62730 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86TargetAsmInfo.cpp | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86TargetAsmInfo.cpp b/lib/Target/X86/X86TargetAsmInfo.cpp index e21596cd916..226feb7c1e6 100644 --- a/lib/Target/X86/X86TargetAsmInfo.cpp +++ b/lib/Target/X86/X86TargetAsmInfo.cpp @@ -411,11 +411,21 @@ bool X86TargetAsmInfo::ExpandInlineAsm(CallInst *CI) const { // bswap $0 if (AsmPieces.size() == 2 && - AsmPieces[0] == "bswap" && AsmPieces[1] == "$0") { + AsmPieces[0] == "bswap" && (AsmPieces[1] == "$0" || + AsmPieces[1] == "${0:q}")) { // No need to check constraints, nothing other than the equivalent of // "=r,0" would be valid here. return LowerToBSwap(CI); } + // rorw $$8, ${0:w} --> llvm.bswap.i16 + if (CI->getType() == Type::Int16Ty && + AsmPieces.size() == 3 && + AsmPieces[0] == "rorw" && + AsmPieces[1] == "$$8," && + AsmPieces[2] == "${0:w}" && + IA->getConstraintString() == "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}") { + return LowerToBSwap(CI); + } break; case 3: if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 &&