From dc879296090a738c66968f5eec77db65d7e03623 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 31 Mar 2006 00:28:56 +0000 Subject: [PATCH] Implement TargetLowering::getPackedTypeBreakdown git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 41 +++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 64d1cdb3a84..b9c10ce103e 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -14,6 +14,7 @@ #include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/MRegisterInfo.h" +#include "llvm/DerivedTypes.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/ADT/StringExtras.h" #include "llvm/Support/MathExtras.h" @@ -141,6 +142,46 @@ const char *TargetLowering::getTargetNodeName(unsigned Opcode) const { return NULL; } +/// getPackedTypeBreakdown - Packed types are broken down into some number of +/// legal scalar types. For example, <8 x float> maps to 2 MVT::v2f32 values +/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack. +/// +/// This method returns the number and type of the resultant breakdown. +/// +MVT::ValueType TargetLowering::getPackedTypeBreakdown(const PackedType *PTy, + unsigned &NumVals) const { + // Figure out the right, legal destination reg to copy into. + unsigned NumElts = PTy->getNumElements(); + MVT::ValueType EltTy = getValueType(PTy->getElementType()); + + unsigned NumVectorRegs = 1; + + // Divide the input until we get to a supported size. This will always + // end with a scalar if the target doesn't support vectors. + while (NumElts > 1 && !isTypeLegal(getVectorType(EltTy, NumElts))) { + NumElts >>= 1; + NumVectorRegs <<= 1; + } + + MVT::ValueType VT; + if (NumElts == 1) + VT = EltTy; + else + VT = getVectorType(EltTy, NumElts); + + MVT::ValueType DestVT = getTypeToTransformTo(VT); + if (DestVT < VT) { + // Value is expanded, e.g. i64 -> i16. + NumVals = NumVectorRegs*(MVT::getSizeInBits(VT)/MVT::getSizeInBits(DestVT)); + } else { + // Otherwise, promotion or legal types use the same number of registers as + // the vector decimated to the appropriate level. + NumVals = NumVectorRegs; + } + + return DestVT; +} + //===----------------------------------------------------------------------===// // Optimization Methods //===----------------------------------------------------------------------===//