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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 00:11:00 +00:00
Lower the MBlaze target specific calling conventions for "interrupt_handler"
and "save_volatiles" correctly. This completes the custom calling convention functionality changes for the MBlaze backend that were started in 121888. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121891 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -132,6 +132,92 @@ static void analyzeFrameIndexes(MachineFunction &MF) {
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MBlazeFI->setStackAdjust(StackAdjust);
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}
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static void interruptFrameLayout(MachineFunction &MF) {
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const Function *F = MF.getFunction();
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llvm::CallingConv::ID CallConv = F->getCallingConv();
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// If this function is not using either the interrupt_handler
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// calling convention or the save_volatiles calling convention
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// then we don't need to do any additional frame layout.
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if (CallConv != llvm::CallingConv::MBLAZE_INTR &&
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CallConv != llvm::CallingConv::MBLAZE_SVOL)
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return;
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MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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const MBlazeInstrInfo &TII =
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*static_cast<const MBlazeInstrInfo*>(MF.getTarget().getInstrInfo());
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// Determine if the calling convention is the interrupt_handler
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// calling convention. Some pieces of the prologue and epilogue
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// only need to be emitted if we are lowering and interrupt handler.
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bool isIntr = CallConv == llvm::CallingConv::MBLAZE_INTR;
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// Determine where to put prologue and epilogue additions
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MachineBasicBlock &MENT = MF.front();
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MachineBasicBlock &MEXT = MF.back();
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MachineBasicBlock::iterator MENTI = MENT.begin();
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MachineBasicBlock::iterator MEXTI = prior(MEXT.end());
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DebugLoc ENTDL = MENTI != MENT.end() ? MENTI->getDebugLoc() : DebugLoc();
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DebugLoc EXTDL = MEXTI != MEXT.end() ? MEXTI->getDebugLoc() : DebugLoc();
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// Store the frame indexes generated during prologue additions for use
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// when we are generating the epilogue additions.
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SmallVector<int, 10> VFI;
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// Build the prologue SWI for R3 - R12 if needed. Note that R11 must
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// always have a SWI because it is used when processing RMSR.
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for (unsigned r = MBlaze::R3; r <= MBlaze::R12; ++r) {
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if (!MRI.isPhysRegUsed(r) && !(isIntr && r == MBlaze::R11)) continue;
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int FI = MFI->CreateStackObject(4,4,false,false);
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VFI.push_back(FI);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), r)
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.addFrameIndex(FI).addImm(0);
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}
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// Build the prologue SWI for R17, R18
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int R17FI = MFI->CreateStackObject(4,4,false,false);
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int R18FI = MFI->CreateStackObject(4,4,false,false);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R17)
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.addFrameIndex(R17FI).addImm(0);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R18)
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.addFrameIndex(R18FI).addImm(0);
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// Buid the prologue SWI and the epilogue LWI for RMSR if needed
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if (isIntr) {
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int MSRFI = MFI->CreateStackObject(4,4,false,false);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::MFS), MBlaze::R11)
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.addReg(MBlaze::RMSR);
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BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R11)
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.addFrameIndex(MSRFI).addImm(0);
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R11)
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.addFrameIndex(MSRFI).addImm(0);
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::MTS), MBlaze::RMSR)
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.addReg(MBlaze::R11);
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}
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// Build the epilogue LWI for R17, R18
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R18)
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.addFrameIndex(R18FI).addImm(0);
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R17)
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.addFrameIndex(R17FI).addImm(0);
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// Build the epilogue LWI for R3 - R12 if needed
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for (unsigned r = MBlaze::R12, i = VFI.size(); r >= MBlaze::R3; --r) {
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if (!MRI.isPhysRegUsed(r)) continue;
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BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), r)
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.addFrameIndex(VFI[--i]).addImm(0);
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}
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}
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static void determineFrameLayout(MachineFunction &MF) {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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@ -174,6 +260,9 @@ void MBlazeFrameInfo::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock::iterator MBBI = MBB.begin();
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DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
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llvm::CallingConv::ID CallConv = MF.getFunction()->getCallingConv();
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bool requiresRA = CallConv == llvm::CallingConv::MBLAZE_INTR;
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// Determine the correct frame layout
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determineFrameLayout(MF);
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@ -181,7 +270,7 @@ void MBlazeFrameInfo::emitPrologue(MachineFunction &MF) const {
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unsigned StackSize = MFI->getStackSize();
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// No need to allocate space on the stack.
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if (StackSize == 0 && !MFI->adjustsStack()) return;
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if (StackSize == 0 && !MFI->adjustsStack() && !requiresRA) return;
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int FPOffset = MBlazeFI->getFPStackOffset();
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int RAOffset = MBlazeFI->getRAStackOffset();
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@ -191,7 +280,7 @@ void MBlazeFrameInfo::emitPrologue(MachineFunction &MF) const {
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.addReg(MBlaze::R1).addImm(-StackSize);
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// swi R15, R1, stack_loc
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if (MFI->adjustsStack()) {
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if (MFI->adjustsStack() || requiresRA) {
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BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
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.addReg(MBlaze::R15).addReg(MBlaze::R1).addImm(RAOffset);
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}
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@ -217,6 +306,9 @@ void MBlazeFrameInfo::emitEpilogue(MachineFunction &MF,
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DebugLoc dl = MBBI->getDebugLoc();
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llvm::CallingConv::ID CallConv = MF.getFunction()->getCallingConv();
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bool requiresRA = CallConv == llvm::CallingConv::MBLAZE_INTR;
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// Get the FI's where RA and FP are saved.
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int FPOffset = MBlazeFI->getFPStackOffset();
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int RAOffset = MBlazeFI->getRAStackOffset();
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@ -232,7 +324,7 @@ void MBlazeFrameInfo::emitEpilogue(MachineFunction &MF,
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}
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// lwi R15, R1, stack_loc
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if (MFI->adjustsStack()) {
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if (MFI->adjustsStack() || requiresRA) {
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BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15)
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.addReg(MBlaze::R1).addImm(RAOffset);
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}
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@ -251,8 +343,10 @@ void MBlazeFrameInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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const {
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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llvm::CallingConv::ID CallConv = MF.getFunction()->getCallingConv();
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bool requiresRA = CallConv == llvm::CallingConv::MBLAZE_INTR;
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if (MFI->adjustsStack()) {
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if (MFI->adjustsStack() || requiresRA) {
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MBlazeFI->setRAStackOffset(0);
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MFI->CreateFixedObject(4,0,true);
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}
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@ -262,5 +356,6 @@ void MBlazeFrameInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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MFI->CreateFixedObject(4,4,true);
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}
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interruptFrameLayout(MF);
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analyzeFrameIndexes(MF);
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}
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@ -864,13 +864,18 @@ LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
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Flag = Chain.getValue(1);
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}
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// Return on MBlaze is always a "rtsd R15, 8"
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// If this function is using the interrupt_handler calling convention
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// then use "rtid r14, 0" otherwise use "rtsd r15, 8"
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unsigned Ret = (CallConv == llvm::CallingConv::MBLAZE_INTR) ? MBlazeISD::IRet
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: MBlazeISD::Ret;
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unsigned Reg = (CallConv == llvm::CallingConv::MBLAZE_INTR) ? MBlaze::R14
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: MBlaze::R15;
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SDValue DReg = DAG.getRegister(Reg, MVT::i32);
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if (Flag.getNode())
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return DAG.getNode(MBlazeISD::Ret, dl, MVT::Other,
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Chain, DAG.getRegister(MBlaze::R15, MVT::i32), Flag);
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else // Return Void
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return DAG.getNode(MBlazeISD::Ret, dl, MVT::Other,
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Chain, DAG.getRegister(MBlaze::R15, MVT::i32));
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return DAG.getNode(Ret, dl, MVT::Other, Chain, DReg, Flag);
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return DAG.getNode(Ret, dl, MVT::Other, Chain, DReg);
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}
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//===----------------------------------------------------------------------===//
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@ -78,8 +78,11 @@ namespace llvm {
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// Integer Compare
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ICmp,
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// Return
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Ret
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// Return from subroutine
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Ret,
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// Return from interrupt
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IRet
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};
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}
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@ -18,6 +18,7 @@ include "MBlazeInstrFormats.td"
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// def SDTMBlazeSelectCC : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>]>;
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def SDT_MBlazeRet : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def SDT_MBlazeIRet : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def SDT_MBlazeJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
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def SDT_MBCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
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def SDT_MBCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
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@ -28,6 +29,8 @@ def SDT_MBCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>, SDTCisVT<1, i32>]>;
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def MBlazeRet : SDNode<"MBlazeISD::Ret", SDT_MBlazeRet,
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[SDNPHasChain, SDNPOptInFlag]>;
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def MBlazeIRet : SDNode<"MBlazeISD::IRet", SDT_MBlazeIRet,
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[SDNPHasChain, SDNPOptInFlag]>;
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def MBlazeJmpLink : SDNode<"MBlazeISD::JmpLink",SDT_MBlazeJmpLink,
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[SDNPHasChain,SDNPOptInFlag,SDNPOutFlag]>;
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@ -727,6 +730,7 @@ def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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// Ret instructions
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def : Pat<(MBlazeRet GPR:$target), (RTSD GPR:$target, 0x8)>;
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def : Pat<(MBlazeIRet GPR:$target), (RTID GPR:$target, 0x0)>;
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// BR instructions
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def : Pat<(br bb:$T), (BRID bb:$T)>;
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48
test/CodeGen/MBlaze/intr.ll
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48
test/CodeGen/MBlaze/intr.ll
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@ -0,0 +1,48 @@
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; Ensure that the MBlaze interrupt_handler calling convention (cc73) is handled
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; correctly correctly by the MBlaze backend.
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;
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; RUN: llc < %s -march=mblaze | FileCheck %s
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@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00"
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@_interrupt_handler = alias void ()* @myintr
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define cc73 void @myintr() nounwind noinline {
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; CHECK: myintr:
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; CHECK: swi r3, r1
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; CHECK: swi r4, r1
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; CHECK: swi r5, r1
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; CHECK: swi r6, r1
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; CHECK: swi r7, r1
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; CHECK: swi r8, r1
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; CHECK: swi r9, r1
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; CHECK: swi r10, r1
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; CHECK: swi r11, r1
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; CHECK: swi r12, r1
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; CHECK: swi r17, r1
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; CHECK: swi r18, r1
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; CHECK: mfs r11, rmsr
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; CHECK: swi r11, r1
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entry:
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%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0))
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ret void
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; CHECK: lwi r11, r1
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; CHECK: mts rmsr, r11
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; CHECK: lwi r18, r1
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; CHECK: lwi r17, r1
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; CHECK: lwi r12, r1
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; CHECK: lwi r11, r1
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; CHECK: lwi r10, r1
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; CHECK: lwi r9, r1
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; CHECK: lwi r8, r1
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; CHECK: lwi r7, r1
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; CHECK: lwi r6, r1
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; CHECK: lwi r5, r1
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; CHECK: lwi r4, r1
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; CHECK: lwi r3, r1
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; CHECK: rtid r14, 0
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}
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; CHECK: .globl _interrupt_handler
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; CHECK: _interrupt_handler = myintr
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declare i32 @printf(i8*, ...)
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80
test/CodeGen/MBlaze/svol.ll
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80
test/CodeGen/MBlaze/svol.ll
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@ -0,0 +1,80 @@
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; Ensure that the MBlaze save_volatiles calling convention (cc74) is handled
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; correctly correctly by the MBlaze backend.
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;
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; RUN: llc < %s -march=mblaze | FileCheck %s
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@.str = private constant [28 x i8] c"The interrupt has gone off\0A\00"
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define cc74 void @mysvol() nounwind noinline {
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; CHECK: mysvol:
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; CHECK: swi r3, r1
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; CHECK: swi r4, r1
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; CHECK: swi r5, r1
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; CHECK: swi r6, r1
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; CHECK: swi r7, r1
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; CHECK: swi r8, r1
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; CHECK: swi r9, r1
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; CHECK: swi r10, r1
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; CHECK: swi r11, r1
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; CHECK: swi r12, r1
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; CHECK: swi r17, r1
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; CHECK: swi r18, r1
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; CHECK-NOT: mfs r11, rmsr
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entry:
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%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([28 x i8]* @.str, i32 0, i32 0))
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ret void
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; CHECK-NOT: mts rmsr, r11
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; CHECK: lwi r18, r1
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; CHECK: lwi r17, r1
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; CHECK: lwi r12, r1
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; CHECK: lwi r11, r1
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; CHECK: lwi r10, r1
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; CHECK: lwi r9, r1
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; CHECK: lwi r8, r1
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; CHECK: lwi r7, r1
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; CHECK: lwi r6, r1
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; CHECK: lwi r5, r1
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; CHECK: lwi r4, r1
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; CHECK: lwi r3, r1
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; CHECK: rtsd r15, 8
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}
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define cc74 void @mysvol2() nounwind noinline {
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; CHECK: mysvol2:
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; CHECK-NOT: swi r3, r1
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; CHECK-NOT: swi r4, r1
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; CHECK-NOT: swi r5, r1
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; CHECK-NOT: swi r6, r1
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; CHECK-NOT: swi r7, r1
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; CHECK-NOT: swi r8, r1
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; CHECK-NOT: swi r9, r1
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; CHECK-NOT: swi r10, r1
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; CHECK-NOT: swi r11, r1
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; CHECK-NOT: swi r12, r1
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; CHECK: swi r17, r1
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; CHECK: swi r18, r1
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; CHECK-NOT: mfs r11, rmsr
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entry:
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; CHECK-NOT: mts rmsr, r11
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; CHECK: lwi r18, r1
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; CHECK: lwi r17, r1
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; CHECK-NOT: lwi r12, r1
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; CHECK-NOT: lwi r11, r1
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; CHECK-NOT: lwi r10, r1
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; CHECK-NOT: lwi r9, r1
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; CHECK-NOT: lwi r8, r1
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; CHECK-NOT: lwi r7, r1
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; CHECK-NOT: lwi r6, r1
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; CHECK-NOT: lwi r5, r1
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; CHECK-NOT: lwi r4, r1
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; CHECK-NOT: lwi r3, r1
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; CHECK: rtsd r15, 8
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ret void
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}
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; CHECK-NOT: .globl _interrupt_handler
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; CHECK-NOT: _interrupt_handler = mysvol
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; CHECK-NOT: _interrupt_handler = mysvol2
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declare i32 @printf(i8*, ...)
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