Sparc: Perform leaf procedure optimization by default

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183083 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju 2013-06-02 02:24:27 +00:00
parent 44dbb749f0
commit dd48226b15
10 changed files with 37 additions and 35 deletions

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@ -28,7 +28,7 @@ using namespace llvm;
static cl::opt<bool>
DisableLeafProc("disable-sparc-leaf-proc",
cl::init(true),
cl::init(false),
cl::desc("Disable Sparc leaf procedure optimization."),
cl::Hidden);

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@ -2,8 +2,6 @@
;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
;RUN: llc -march=sparc -disable-sparc-leaf-proc=0 < %s | FileCheck %s -check-prefix=V8LEAF
;RUN: llc -march=sparc -disable-sparc-leaf-proc=0 -mattr=v9 < %s | FileCheck %s -check-prefix=V9LEAF
define i8* @frameaddr() nounwind readnone {
@ -41,16 +39,10 @@ declare i8* @llvm.frameaddress(i32) nounwind readnone
define i8* @retaddr() nounwind readnone {
entry:
;V8: retaddr
;V8: or %g0, %i7, {{.+}}
;V8: or %g0, %o7, {{.+}}
;V9: retaddr
;V9: or %g0, %i7, {{.+}}
;V8LEAF: retaddr:
;V8LEAF: or %g0, %o7, %o0
;V9LEAF: retaddr:
;V9LEAF: or %g0, %o7, %o0
;V9: or %g0, %o7, {{.+}}
%0 = tail call i8* @llvm.returnaddress(i32 0)
ret i8* %0

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@ -48,7 +48,7 @@ bb: ; preds = %entry, %bb
bb5: ; preds = %bb, %entry
%a_addr.1.lcssa = phi i32 [ %a, %entry ], [ %a_addr.0, %bb ]
;CHECK: jmp
;CHECK-NEXT: restore
;CHECK-NOT: restore
ret i32 %a_addr.1.lcssa
}

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@ -5,8 +5,8 @@
define weak void @make_foo(%struct.foo_t* noalias sret %agg.result, i32 %a, i32 %b, i32 %c) nounwind {
entry:
;CHECK: make_foo
;CHECK: ld [%fp+64], {{.+}}
;CHECK: jmp %i7+12
;CHECK: ld [%sp+64], {{.+}}
;CHECK: jmp %o7+12
%0 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 0
store i32 %a, i32* %0, align 4
%1 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 1

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@ -1,4 +1,4 @@
; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler | FileCheck %s
; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler -disable-sparc-leaf-proc | FileCheck %s
; CHECK: intarg
; The save/restore frame is not strictly necessary here, but we would need to

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@ -1,4 +1,4 @@
; RUN: llc < %s -march=sparcv9 | FileCheck %s
; RUN: llc < %s -march=sparcv9 -disable-sparc-leaf-proc | FileCheck %s
; CHECK: ret2:
; CHECK: or %g0, %i1, %i0

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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=sparc64-pc-openbsd | FileCheck %s
; RUN: llc < %s -mtriple=sparc64-pc-openbsd -disable-sparc-leaf-proc | FileCheck %s
; Testing 64-bit conditionals. The sparc64 triple is an alias for sparcv9.
; CHECK: cmpri

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@ -4,7 +4,7 @@ define i32 @test0(i32 %X) {
%tmp.1 = add i32 %X, 1
ret i32 %tmp.1
; CHECK: test0:
; CHECK: add %i0, 1, %i0
; CHECK: add %o0, 1, %o0
}
@ -14,7 +14,7 @@ define i32 @test1(i32 %X, i32 %Y) {
%B = xor i32 %A, -1
ret i32 %B
; CHECK: test1:
; CHECK: xnor %i0, %i1, %i0
; CHECK: xnor %o0, %o1, %o0
}
define i32 @test2(i32 %X, i32 %Y) {
@ -22,5 +22,5 @@ define i32 @test2(i32 %X, i32 %Y) {
%B = xor i32 %A, %Y
ret i32 %B
; CHECK: test2:
; CHECK: xnor %i0, %i1, %i0
; CHECK: xnor %o0, %o1, %o0
}

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@ -12,15 +12,17 @@ entry:
; abs32: floatCP
; abs32: sethi %hi(.LCPI0_0), %[[R:[gilo][0-7]]]
; abs32: jmp %o7+8
; abs32: ld [%[[R]]+%lo(.LCPI0_0)], %f
; abs32: jmp %i7+8
; abs44: floatCP
; abs44: sethi %h44(.LCPI0_0), %[[R1:[gilo][0-7]]]
; abs44: add %[[R1]], %m44(.LCPI0_0), %[[R2:[gilo][0-7]]]
; abs44: sllx %[[R2]], 12, %[[R3:[gilo][0-7]]]
; abs44: jmp %o7+8
; abs44: ld [%[[R3]]+%l44(.LCPI0_0)], %f1
; abs44: jmp %i7+8
; abs64: floatCP
; abs64: sethi %hi(.LCPI0_0), %[[R1:[gilo][0-7]]]
@ -28,21 +30,24 @@ entry:
; abs64: sethi %hh(.LCPI0_0), %[[R3:[gilo][0-7]]]
; abs64: add %[[R3]], %hm(.LCPI0_0), %[[R4:[gilo][0-7]]]
; abs64: sllx %[[R4]], 32, %[[R5:[gilo][0-7]]]
; abs64: jmp %o7+8
; abs64: ld [%[[R5]]+%[[R2]]], %f1
; abs64: jmp %i7+8
; v8pic32: floatCP
; v8pic32: _GLOBAL_OFFSET_TABLE_
; v8pic32: sethi %hi(.LCPI0_0), %[[R1:[gilo][0-7]]]
; v8pic32: add %[[R1]], %lo(.LCPI0_0), %[[Goffs:[gilo][0-7]]]
; v8pic32: ld [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]]
; v8pic32: jmp %o7+8
; v8pic32: ld [%[[Gaddr]]], %f0
; v8pic32: jmp %i7+8
; v9pic32: floatCP
; v9pic32: _GLOBAL_OFFSET_TABLE_
; v9pic32: sethi %hi(.LCPI0_0), %[[R1:[gilo][0-7]]]
; v9pic32: add %[[R1]], %lo(.LCPI0_0), %[[Goffs:[gilo][0-7]]]
; v9pic32: ldx [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]]
; v9pic32: jmp %o7+8
; v9pic32: ld [%[[Gaddr]]], %f1
; v9pic32: jmp %i7+8

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@ -14,15 +14,17 @@ define zeroext i8 @loadG() {
; abs32: loadG
; abs32: sethi %hi(G), %[[R:[gilo][0-7]]]
; abs32: ldub [%[[R]]+%lo(G)], %i0
; abs32: jmp %i7+8
; abs32: jmp %o7+8
; abs32: ldub [%[[R]]+%lo(G)], %o0
; abs44: loadG
; abs44: sethi %h44(G), %[[R1:[gilo][0-7]]]
; abs44: add %[[R1]], %m44(G), %[[R2:[gilo][0-7]]]
; abs44: sllx %[[R2]], 12, %[[R3:[gilo][0-7]]]
; abs44: ldub [%[[R3]]+%l44(G)], %i0
; abs44: jmp %i7+8
; abs44: jmp %o7+8
; abs44: ldub [%[[R3]]+%l44(G)], %o0
; abs64: loadG
; abs64: sethi %hi(G), %[[R1:[gilo][0-7]]]
@ -30,21 +32,24 @@ define zeroext i8 @loadG() {
; abs64: sethi %hh(G), %[[R3:[gilo][0-7]]]
; abs64: add %[[R3]], %hm(G), %[[R4:[gilo][0-7]]]
; abs64: sllx %[[R4]], 32, %[[R5:[gilo][0-7]]]
; abs64: ldub [%[[R5]]+%[[R2]]], %i0
; abs64: jmp %i7+8
; abs64: jmp %o7+8
; abs64: ldub [%[[R5]]+%[[R2]]], %o0
; v8pic32: loadG
; v8pic32: _GLOBAL_OFFSET_TABLE_
; v8pic32: sethi %hi(G), %[[R1:[gilo][0-7]]]
; v8pic32: add %[[R1]], %lo(G), %[[Goffs:[gilo][0-7]]]
; v8pic32: ld [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]]
; v8pic32: ldub [%[[Gaddr]]], %i0
; v8pic32: jmp %i7+8
; v8pic32: jmp %o7+8
; v8pic32: ldub [%[[Gaddr]]], %o0
; v9pic32: loadG
; v9pic32: _GLOBAL_OFFSET_TABLE_
; v9pic32: sethi %hi(G), %[[R1:[gilo][0-7]]]
; v9pic32: add %[[R1]], %lo(G), %[[Goffs:[gilo][0-7]]]
; v9pic32: ldx [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]]
; v9pic32: ldub [%[[Gaddr]]], %i0
; v9pic32: jmp %i7+8
; v9pic32: jmp %o7+8
; v9pic32: ldub [%[[Gaddr]]], %o0