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cleaned line endings in the newly added test file

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155315 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Elena Demikhovsky 2012-04-22 13:22:48 +00:00
parent bfae1fd1fc
commit dd9047815c
1 changed files with 68 additions and 68 deletions
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136
test/CodeGen/X86/avx2-conversions.ll
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@ -1,68 +1,68 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
; CHECK: trunc4
; CHECK: vpermd
; CHECK-NOT: vinsert
; CHECK: ret
define <4 x i32> @trunc4(<4 x i64> %A) nounwind {
%B = trunc <4 x i64> %A to <4 x i32>
ret <4 x i32>%B
}
; CHECK: trunc8
; CHECK: vpshufb
; CHECK-NOT: vinsert
; CHECK: ret
define <8 x i16> @trunc8(<8 x i32> %A) nounwind {
%B = trunc <8 x i32> %A to <8 x i16>
ret <8 x i16>%B
}
; CHECK: sext4
; CHECK: vpmovsxdq
; CHECK-NOT: vinsert
; CHECK: ret
define <4 x i64> @sext4(<4 x i32> %A) nounwind {
%B = sext <4 x i32> %A to <4 x i64>
ret <4 x i64>%B
}
; CHECK: sext8
; CHECK: vpmovsxwd
; CHECK-NOT: vinsert
; CHECK: ret
define <8 x i32> @sext8(<8 x i16> %A) nounwind {
%B = sext <8 x i16> %A to <8 x i32>
ret <8 x i32>%B
}
; CHECK: zext4
; CHECK: vpmovzxdq
; CHECK-NOT: vinsert
; CHECK: ret
define <4 x i64> @zext4(<4 x i32> %A) nounwind {
%B = zext <4 x i32> %A to <4 x i64>
ret <4 x i64>%B
}
; CHECK: zext8
; CHECK: vpmovzxwd
; CHECK-NOT: vinsert
; CHECK: ret
define <8 x i32> @zext8(<8 x i16> %A) nounwind {
%B = zext <8 x i16> %A to <8 x i32>
ret <8 x i32>%B
}
; CHECK: zext_8i8_8i32
; CHECK: vpmovzxwd
; CHECK: vpand
; CHECK: ret
define <8 x i32> @zext_8i8_8i32(<8 x i8> %A) nounwind {
%B = zext <8 x i8> %A to <8 x i32>
ret <8 x i32>%B
}
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
; CHECK: trunc4
; CHECK: vpermd
; CHECK-NOT: vinsert
; CHECK: ret
define <4 x i32> @trunc4(<4 x i64> %A) nounwind {
%B = trunc <4 x i64> %A to <4 x i32>
ret <4 x i32>%B
}
; CHECK: trunc8
; CHECK: vpshufb
; CHECK-NOT: vinsert
; CHECK: ret
define <8 x i16> @trunc8(<8 x i32> %A) nounwind {
%B = trunc <8 x i32> %A to <8 x i16>
ret <8 x i16>%B
}
; CHECK: sext4
; CHECK: vpmovsxdq
; CHECK-NOT: vinsert
; CHECK: ret
define <4 x i64> @sext4(<4 x i32> %A) nounwind {
%B = sext <4 x i32> %A to <4 x i64>
ret <4 x i64>%B
}
; CHECK: sext8
; CHECK: vpmovsxwd
; CHECK-NOT: vinsert
; CHECK: ret
define <8 x i32> @sext8(<8 x i16> %A) nounwind {
%B = sext <8 x i16> %A to <8 x i32>
ret <8 x i32>%B
}
; CHECK: zext4
; CHECK: vpmovzxdq
; CHECK-NOT: vinsert
; CHECK: ret
define <4 x i64> @zext4(<4 x i32> %A) nounwind {
%B = zext <4 x i32> %A to <4 x i64>
ret <4 x i64>%B
}
; CHECK: zext8
; CHECK: vpmovzxwd
; CHECK-NOT: vinsert
; CHECK: ret
define <8 x i32> @zext8(<8 x i16> %A) nounwind {
%B = zext <8 x i16> %A to <8 x i32>
ret <8 x i32>%B
}
; CHECK: zext_8i8_8i32
; CHECK: vpmovzxwd
; CHECK: vpand
; CHECK: ret
define <8 x i32> @zext_8i8_8i32(<8 x i8> %A) nounwind {
%B = zext <8 x i8> %A to <8 x i32>
ret <8 x i32>%B
}