6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-28 04:33:05 +00:00
Code Issues Projects Releases Wiki Activity

[mips][msa] Separate the configuration of int/float vector types since they will diverge soon

Browse Source 
No functional change



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190506 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2013-09-11 10:15:48 +00:00
parent 8857294192
commit ddfbd58054
2 changed files with 25 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lib/Target/Mips/MipsSEISelLowering.cpp
View File

@ -83,13 +83,13 @@ MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM)
setOperationAction(ISD::MUL, MVT::v2i16, Legal);
if (Subtarget->hasMSA()) {
addMSAType(MVT::v16i8, &Mips::MSA128BRegClass);
addMSAType(MVT::v8i16, &Mips::MSA128HRegClass);
addMSAType(MVT::v4i32, &Mips::MSA128WRegClass);
addMSAType(MVT::v2i64, &Mips::MSA128DRegClass);
addMSAType(MVT::v8f16, &Mips::MSA128HRegClass);
addMSAType(MVT::v4f32, &Mips::MSA128WRegClass);
addMSAType(MVT::v2f64, &Mips::MSA128DRegClass);
addMSAIntType(MVT::v16i8, &Mips::MSA128BRegClass);
addMSAIntType(MVT::v8i16, &Mips::MSA128HRegClass);
addMSAIntType(MVT::v4i32, &Mips::MSA128WRegClass);
addMSAIntType(MVT::v2i64, &Mips::MSA128DRegClass);
addMSAFloatType(MVT::v8f16, &Mips::MSA128HRegClass);
addMSAFloatType(MVT::v4f32, &Mips::MSA128WRegClass);
addMSAFloatType(MVT::v2f64, &Mips::MSA128DRegClass);
}
if (!Subtarget->mipsSEUsesSoftFloat()) {
@ -148,7 +148,21 @@ llvm::createMipsSETargetLowering(MipsTargetMachine &TM) {
}
void MipsSETargetLowering::
addMSAType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC) {
addMSAIntType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC) {
addRegisterClass(Ty, RC);
// Expand all builtin opcodes.
for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
setOperationAction(Opc, Ty, Expand);
setOperationAction(ISD::BITCAST, Ty, Legal);
setOperationAction(ISD::LOAD, Ty, Legal);
setOperationAction(ISD::STORE, Ty, Legal);
}
void MipsSETargetLowering::
addMSAFloatType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC) {
addRegisterClass(Ty, RC);
// Expand all builtin opcodes.

4
lib/Target/Mips/MipsSEISelLowering.h
View File

@ -22,7 +22,9 @@ namespace llvm {
public:
explicit MipsSETargetLowering(MipsTargetMachine &TM);
void addMSAType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC);
void addMSAIntType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC);
void addMSAFloatType(MVT::SimpleValueType Ty,
const TargetRegisterClass *RC);
virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;