From de48ee28a319f3990dcaac637b6dad78d48ab61f Mon Sep 17 00:00:00 2001 From: Jim Laskey Date: Mon, 19 Dec 2005 16:30:13 +0000 Subject: [PATCH] Create a strong dependency for loads following stores. This will leave a latency period between the two. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24860 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index 0ca2f19d5bf..efaf73c573f 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -281,7 +281,9 @@ public: InstrStage *StageBegin; // First stage in itinerary InstrStage *StageEnd; // Last+1 stage in itinerary unsigned Latency; // Total cycles to complete instruction - bool IsCall; // Is function call + bool IsCall : 1; // Is function call + bool IsLoad : 1; // Is memory load + bool IsStore : 1; // Is memory store unsigned Slot; // Node's time slot NodeGroup *Group; // Grouping information unsigned VRBase; // Virtual register base @@ -756,6 +758,8 @@ void SimpleSched::GatherSchedulingInfo() { // Get machine opcode MachineOpCode TOpc = Node->getTargetOpcode(); NI->IsCall = TII.isCall(TOpc); + NI->IsLoad = TII.isLoad(TOpc); + NI->IsStore = TII.isStore(TOpc); if (TII.isLoad(TOpc)) NI->StageBegin = &LoadStage; else if (TII.isStore(TOpc)) NI->StageBegin = &StoreStage; @@ -857,7 +861,7 @@ void SimpleSched::PrepareNodeInfo() { /// I.E., B must wait for latency of A. bool SimpleSched::isStrongDependency(NodeInfo *A, NodeInfo *B) { // If A defines for B then it's a strong dependency - return isDefiner(A, B); + return isDefiner(A, B) || (A->IsStore && B->IsLoad); } /// isWeakDependency Return true if node A produces a result that will