From dea546b62339578938a91f05a00a145baf921f6c Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 6 Nov 2010 18:58:32 +0000
Subject: [PATCH] move fnstsw aliases to .td file, fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118349 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/AsmParser/X86AsmParser.cpp | 35 -----------------------
 lib/Target/X86/X86InstrInfo.td            |  7 ++++-
 2 files changed, 6 insertions(+), 36 deletions(-)

diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 69e6b5a78cf..4ab25cf4bf8 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -781,22 +781,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
                     X86Operand::CreateImm(One, NameLoc, NameLoc));
   }
 
-
-  // FIXME: Hack to handle recognize "in[bwl] <op>".  Canonicalize it to
-  // "inb <op>, %al".
-  if ((Name == "inb" || Name == "inw" || Name == "inl") &&
-      Operands.size() == 2) {
-    unsigned Reg;
-    if (Name[2] == 'b')
-      Reg = MatchRegisterName("al");
-    else if (Name[2] == 'w')
-      Reg = MatchRegisterName("ax");
-    else
-      Reg = MatchRegisterName("eax");
-    SMLoc Loc = Operands.back()->getEndLoc();
-    Operands.push_back(X86Operand::CreateReg(Reg, Loc, Loc));
-  }
-
   // FIXME: Hack to handle "out[bwl]? %al, (%dx)" -> "outb %al, %dx".
   if ((Name == "outb" || Name == "outw" || Name == "outl" || Name == "out") &&
       Operands.size() == 3) {
@@ -855,25 +839,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
                                              NameLoc, NameLoc));
   }
 
-  // The assembler accepts various amounts of brokenness for fnstsw.
-  if (Name == "fnstsw" || Name == "fnstsww") {
-    if (Operands.size() == 2 &&
-        static_cast<X86Operand*>(Operands[1])->isReg()) {
-      // "fnstsw al" and "fnstsw eax" -> "fnstw"
-      unsigned Reg = static_cast<X86Operand*>(Operands[1])->Reg.RegNo;
-      if (Reg == MatchRegisterName("eax") ||
-          Reg == MatchRegisterName("al")) {
-        delete Operands[1];
-        Operands.pop_back();
-      }
-    }
-
-    // "fnstw" -> "fnstw %ax"
-    if (Operands.size() == 1)
-      Operands.push_back(X86Operand::CreateReg(MatchRegisterName("ax"),
-                                               NameLoc, NameLoc));
-  }
-
   // FIXME: Hack to handle recognize "aa[dm]" -> "aa[dm] $0xA".
   if ((Name.startswith("aad") || Name.startswith("aam")) &&
       Operands.size() == 1) {
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 58573786cf8..125da18600e 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -1373,6 +1373,11 @@ def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>;
 def : InstAlias<"clrl $reg", (XOR32rr GR32:$reg, GR32:$reg)>;
 def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>;
 
+// We accepts "fnstsw %eax" even though it only writes %ax.
+def : InstAlias<"fnstsw %eax", (FNSTSW8r)>;
+def : InstAlias<"fnstsw %al" , (FNSTSW8r)>;
+def : InstAlias<"fnstsw"     , (FNSTSW8r)>;
+
 // lcall and ljmp aliases.  This seems to be an odd mapping in 64-bit mode, but
 // this is compatible with what GAS does.
 def : InstAlias<"lcall $seg, $off", (FARCALL32i i32imm:$off, i16imm:$seg)>;
@@ -1393,7 +1398,7 @@ def : InstAlias<"inb %dx", (IN8rr)>;
 def : InstAlias<"inw %dx", (IN16rr)>;
 def : InstAlias<"inl %dx", (IN32rr)>;
 def : InstAlias<"inb $port", (IN8ri i8imm:$port)>;
-def : InstAlias<"inw $port", (IN16rir i8imm:$port)>;
+def : InstAlias<"inw $port", (IN16ri i8imm:$port)>;
 def : InstAlias<"inl $port", (IN32ri i8imm:$port)>;