6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-09 11:25:55 +00:00
Code Issues Projects Releases Wiki Activity

Remember to promote load/store types for stack to register size.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115984 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2010-10-07 21:40:18 +00:00
parent 9649e9acdd
commit df1f5a924e
1 changed files with 6 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/ARM/ARMFastISel.cpp
View File

@@ -629,6 +629,9 @@ bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Reg,
bool ARMFastISel::ARMLoadAlloca(const Instruction *I, EVT VT) { bool ARMFastISel::ARMLoadAlloca(const Instruction *I, EVT VT) {
Value *Op0 = I->getOperand(0); Value *Op0 = I->getOperand(0);
// Promote load/store types.
if (VT == MVT::i8 || VT == MVT::i16) VT = MVT::i32;
// Verify it's an alloca. // Verify it's an alloca.
if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op0)) { if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op0)) {
DenseMap<const AllocaInst*, int>::iterator SI = DenseMap<const AllocaInst*, int>::iterator SI =
@@ -735,6 +738,9 @@ bool ARMFastISel::SelectLoad(const Instruction *I) {
bool ARMFastISel::ARMStoreAlloca(const Instruction *I, unsigned SrcReg, EVT VT){ bool ARMFastISel::ARMStoreAlloca(const Instruction *I, unsigned SrcReg, EVT VT){
Value *Op1 = I->getOperand(1); Value *Op1 = I->getOperand(1);
// Promote load/store types.
if (VT == MVT::i8 || VT == MVT::i16) VT = MVT::i32;
// Verify it's an alloca. // Verify it's an alloca.
if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op1)) { if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op1)) {
DenseMap<const AllocaInst*, int>::iterator SI = DenseMap<const AllocaInst*, int>::iterator SI =