6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-25 13:24:46 +00:00
Code Issues Projects Releases Wiki Activity

Remove all local variables from X86SelectionDAGInfo, the DAG has

Browse Source 
all of the ones we were stashing away on startup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210385 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2014-06-06 23:26:43 +00:00
parent 6c862ed02b
commit df2f80d909
3 changed files with 29 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

50
lib/Target/X86/X86SelectionDAGInfo.cpp
View File

@@ -11,21 +11,23 @@
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "X86TargetMachine.h" #include "X86InstrInfo.h"
#include "X86ISelLowering.h"
#include "X86RegisterInfo.h"
#include "X86Subtarget.h"
#include "X86SelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/DerivedTypes.h" #include "llvm/IR/DerivedTypes.h"
#include "llvm/Target/TargetLowering.h"
using namespace llvm; using namespace llvm;
#define DEBUG_TYPE "x86-selectiondag-info" #define DEBUG_TYPE "x86-selectiondag-info"
X86SelectionDAGInfo::X86SelectionDAGInfo(const X86TargetMachine &TM) : X86SelectionDAGInfo::X86SelectionDAGInfo(const DataLayout &DL)
TargetSelectionDAGInfo(TM.getDataLayout()), : TargetSelectionDAGInfo(&DL) {}
Subtarget(&TM.getSubtarget<X86Subtarget>()),
TLI(*TM.getTargetLowering()) {
}
X86SelectionDAGInfo::~X86SelectionDAGInfo() { X86SelectionDAGInfo::~X86SelectionDAGInfo() {}
}
SDValue SDValue
X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
@@ -35,6 +37,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
bool isVolatile, bool isVolatile,
MachinePointerInfo DstPtrInfo) const { MachinePointerInfo DstPtrInfo) const {
ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
// If to a segment-relative address space, use the default lowering. // If to a segment-relative address space, use the default lowering.
if (DstPtrInfo.getAddrSpace() >= 256) if (DstPtrInfo.getAddrSpace() >= 256)
@@ -43,16 +46,14 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
// If not DWORD aligned or size is more than the threshold, call the library. // If not DWORD aligned or size is more than the threshold, call the library.
// The libc version is likely to be faster for these cases. It can use the // The libc version is likely to be faster for these cases. It can use the
// address value and run time information about the CPU. // address value and run time information about the CPU.
if ((Align & 3) != 0 || if ((Align & 3) != 0 || !ConstantSize ||
!ConstantSize || ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
ConstantSize->getZExtValue() >
Subtarget->getMaxInlineSizeThreshold()) {
// Check to see if there is a specialized entry-point for memory zeroing. // Check to see if there is a specialized entry-point for memory zeroing.
ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src); ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
if (const char *bzeroEntry = V && if (const char *bzeroEntry = V &&
V->isNullValue() ? Subtarget->getBZeroEntry() : nullptr) { V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
EVT IntPtr = TLI.getPointerTy(); EVT IntPtr = DAG.getTargetLoweringInfo().getPointerTy();
Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext()); Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
TargetLowering::ArgListTy Args; TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry; TargetLowering::ArgListEntry Entry;
@@ -68,7 +69,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
DAG.getExternalSymbol(bzeroEntry, IntPtr), &Args, 0) DAG.getExternalSymbol(bzeroEntry, IntPtr), &Args, 0)
.setDiscardResult(); .setDiscardResult();
std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
return CallResult.second; return CallResult.second;
} }
@@ -99,7 +100,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
ValReg = X86::EAX; ValReg = X86::EAX;
Val = (Val << 8) | Val; Val = (Val << 8) | Val;
Val = (Val << 16) | Val; Val = (Val << 16) | Val;
if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
AVT = MVT::i64; AVT = MVT::i64;
ValReg = X86::RAX; ValReg = X86::RAX;
Val = (Val << 32) | Val; Val = (Val << 32) | Val;
@@ -128,12 +129,10 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
InFlag = Chain.getValue(1); InFlag = Chain.getValue(1);
} }
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX : Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
X86::ECX,
Count, InFlag); Count, InFlag);
InFlag = Chain.getValue(1); InFlag = Chain.getValue(1);
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI : Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
X86::EDI,
Dst, InFlag); Dst, InFlag);
InFlag = Chain.getValue(1); InFlag = Chain.getValue(1);
@@ -182,10 +181,11 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
// This requires the copy size to be a constant, preferably // This requires the copy size to be a constant, preferably
// within a subtarget-specific limit. // within a subtarget-specific limit.
ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
if (!ConstantSize) if (!ConstantSize)
return SDValue(); return SDValue();
uint64_t SizeVal = ConstantSize->getZExtValue(); uint64_t SizeVal = ConstantSize->getZExtValue();
if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold()) if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
return SDValue(); return SDValue();
/// If not DWORD aligned, it is more efficient to call the library. However /// If not DWORD aligned, it is more efficient to call the library. However
@@ -218,7 +218,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
AVT = MVT::i32; AVT = MVT::i32;
else else
// QWORD aligned // QWORD aligned
AVT = Subtarget->is64Bit() ? MVT::i64 : MVT::i32; AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
unsigned UBytes = AVT.getSizeInBits() / 8; unsigned UBytes = AVT.getSizeInBits() / 8;
unsigned CountVal = SizeVal / UBytes; unsigned CountVal = SizeVal / UBytes;
@@ -226,15 +226,15 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
unsigned BytesLeft = SizeVal % UBytes; unsigned BytesLeft = SizeVal % UBytes;
SDValue InFlag; SDValue InFlag;
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX : Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
X86::ECX, X86::ECX,
Count, InFlag); Count, InFlag);
InFlag = Chain.getValue(1); InFlag = Chain.getValue(1);
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI : Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
X86::EDI, X86::EDI,
Dst, InFlag); Dst, InFlag);
InFlag = Chain.getValue(1); InFlag = Chain.getValue(1);
Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI : Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
X86::ESI, X86::ESI,
Src, InFlag); Src, InFlag);
InFlag = Chain.getValue(1); InFlag = Chain.getValue(1);

8
lib/Target/X86/X86SelectionDAGInfo.h
View File

@@ -23,14 +23,8 @@ class X86TargetMachine;
class X86Subtarget; class X86Subtarget;
class X86SelectionDAGInfo : public TargetSelectionDAGInfo { class X86SelectionDAGInfo : public TargetSelectionDAGInfo {
/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
/// make the right decision when generating code for different targets.
const X86Subtarget *Subtarget;
const X86TargetLowering &TLI;
public: public:
explicit X86SelectionDAGInfo(const X86TargetMachine &TM); explicit X86SelectionDAGInfo(const DataLayout &DL);
~X86SelectionDAGInfo(); ~X86SelectionDAGInfo();
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,

2
lib/Target/X86/X86TargetMachine.cpp
View File

@@ -80,7 +80,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
Subtarget.getStackAlignment(), Subtarget.getStackAlignment(),
Subtarget.is64Bit() ? -8 : -4), Subtarget.is64Bit() ? -8 : -4),
DL(computeDataLayout(*getSubtargetImpl())), InstrInfo(*this), DL(computeDataLayout(*getSubtargetImpl())), InstrInfo(*this),
TLInfo(*this), TSInfo(*this), JITInfo(*this) { TLInfo(*this), TSInfo(DL), JITInfo(*this) {
// Determine the PICStyle based on the target selected. // Determine the PICStyle based on the target selected.
if (getRelocationModel() == Reloc::Static) { if (getRelocationModel() == Reloc::Static) {
// Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None. // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.