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Remove all local variables from X86SelectionDAGInfo, the DAG has
all of the ones we were stashing away on startup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210385 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
parent
6c862ed02b
commit
df2f80d909
@ -11,21 +11,23 @@
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//
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//===----------------------------------------------------------------------===//
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#include "X86TargetMachine.h"
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#include "X86InstrInfo.h"
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#include "X86ISelLowering.h"
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#include "X86RegisterInfo.h"
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#include "X86Subtarget.h"
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#include "X86SelectionDAGInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/Target/TargetLowering.h"
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using namespace llvm;
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#define DEBUG_TYPE "x86-selectiondag-info"
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X86SelectionDAGInfo::X86SelectionDAGInfo(const X86TargetMachine &TM) :
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TargetSelectionDAGInfo(TM.getDataLayout()),
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Subtarget(&TM.getSubtarget<X86Subtarget>()),
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TLI(*TM.getTargetLowering()) {
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}
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X86SelectionDAGInfo::X86SelectionDAGInfo(const DataLayout &DL)
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: TargetSelectionDAGInfo(&DL) {}
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X86SelectionDAGInfo::~X86SelectionDAGInfo() {
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}
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X86SelectionDAGInfo::~X86SelectionDAGInfo() {}
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SDValue
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X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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@ -35,6 +37,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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bool isVolatile,
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MachinePointerInfo DstPtrInfo) const {
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ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
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// If to a segment-relative address space, use the default lowering.
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if (DstPtrInfo.getAddrSpace() >= 256)
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@ -43,16 +46,14 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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// If not DWORD aligned or size is more than the threshold, call the library.
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// The libc version is likely to be faster for these cases. It can use the
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// address value and run time information about the CPU.
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if ((Align & 3) != 0 ||
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!ConstantSize ||
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ConstantSize->getZExtValue() >
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Subtarget->getMaxInlineSizeThreshold()) {
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if ((Align & 3) != 0 || !ConstantSize ||
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ConstantSize->getZExtValue() > Subtarget.getMaxInlineSizeThreshold()) {
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// Check to see if there is a specialized entry-point for memory zeroing.
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ConstantSDNode *V = dyn_cast<ConstantSDNode>(Src);
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if (const char *bzeroEntry = V &&
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V->isNullValue() ? Subtarget->getBZeroEntry() : nullptr) {
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EVT IntPtr = TLI.getPointerTy();
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V->isNullValue() ? Subtarget.getBZeroEntry() : nullptr) {
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EVT IntPtr = DAG.getTargetLoweringInfo().getPointerTy();
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Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
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TargetLowering::ArgListTy Args;
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TargetLowering::ArgListEntry Entry;
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@ -68,7 +69,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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DAG.getExternalSymbol(bzeroEntry, IntPtr), &Args, 0)
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.setDiscardResult();
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std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
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std::pair<SDValue,SDValue> CallResult = DAG.getTargetLoweringInfo().LowerCallTo(CLI);
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return CallResult.second;
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}
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@ -99,7 +100,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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ValReg = X86::EAX;
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Val = (Val << 8) | Val;
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Val = (Val << 16) | Val;
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if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
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if (Subtarget.is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned
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AVT = MVT::i64;
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ValReg = X86::RAX;
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Val = (Val << 32) | Val;
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@ -128,13 +129,11 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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InFlag = Chain.getValue(1);
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}
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
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X86::ECX,
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Count, InFlag);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX : X86::ECX,
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Count, InFlag);
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InFlag = Chain.getValue(1);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
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X86::EDI,
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Dst, InFlag);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
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Dst, InFlag);
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InFlag = Chain.getValue(1);
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SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Glue);
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@ -182,10 +181,11 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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// This requires the copy size to be a constant, preferably
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// within a subtarget-specific limit.
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ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
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const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
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if (!ConstantSize)
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return SDValue();
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uint64_t SizeVal = ConstantSize->getZExtValue();
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if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold())
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if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
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return SDValue();
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/// If not DWORD aligned, it is more efficient to call the library. However
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@ -218,7 +218,7 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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AVT = MVT::i32;
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else
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// QWORD aligned
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AVT = Subtarget->is64Bit() ? MVT::i64 : MVT::i32;
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AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
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unsigned UBytes = AVT.getSizeInBits() / 8;
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unsigned CountVal = SizeVal / UBytes;
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@ -226,15 +226,15 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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unsigned BytesLeft = SizeVal % UBytes;
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SDValue InFlag;
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX :
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RCX :
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X86::ECX,
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Count, InFlag);
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InFlag = Chain.getValue(1);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI :
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
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X86::EDI,
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Dst, InFlag);
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InFlag = Chain.getValue(1);
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI :
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Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RSI :
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X86::ESI,
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Src, InFlag);
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InFlag = Chain.getValue(1);
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@ -23,14 +23,8 @@ class X86TargetMachine;
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class X86Subtarget;
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class X86SelectionDAGInfo : public TargetSelectionDAGInfo {
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/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
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/// make the right decision when generating code for different targets.
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const X86Subtarget *Subtarget;
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const X86TargetLowering &TLI;
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public:
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explicit X86SelectionDAGInfo(const X86TargetMachine &TM);
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explicit X86SelectionDAGInfo(const DataLayout &DL);
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~X86SelectionDAGInfo();
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SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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@ -80,7 +80,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
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Subtarget.getStackAlignment(),
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Subtarget.is64Bit() ? -8 : -4),
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DL(computeDataLayout(*getSubtargetImpl())), InstrInfo(*this),
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TLInfo(*this), TSInfo(*this), JITInfo(*this) {
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TLInfo(*this), TSInfo(DL), JITInfo(*this) {
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// Determine the PICStyle based on the target selected.
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if (getRelocationModel() == Reloc::Static) {
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// Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
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