From df445d7af2285c41994f9450a9c57c843d59d3cb Mon Sep 17 00:00:00 2001 From: Juergen Ributzka Date: Mon, 15 Sep 2014 22:33:06 +0000 Subject: [PATCH] [FastISel][AArch64] Lower sin/cos/pow to runtime lib calls. Also lower sin/cos/pow to runtime lib calls. This fixes rdar://problem/18343468. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217839 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64FastISel.cpp | 50 ++++++++++ test/CodeGen/AArch64/fast-isel-frem.ll | 24 ----- .../AArch64/fast-isel-runtime-libcall.ll | 96 +++++++++++++++++++ 3 files changed, 146 insertions(+), 24 deletions(-) delete mode 100644 test/CodeGen/AArch64/fast-isel-frem.ll create mode 100644 test/CodeGen/AArch64/fast-isel-runtime-libcall.ll diff --git a/lib/Target/AArch64/AArch64FastISel.cpp b/lib/Target/AArch64/AArch64FastISel.cpp index 9658834b750..6456796a21e 100644 --- a/lib/Target/AArch64/AArch64FastISel.cpp +++ b/lib/Target/AArch64/AArch64FastISel.cpp @@ -2638,6 +2638,56 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) { return lowerCallTo(II, "memset", II->getNumArgOperands() - 2); } + case Intrinsic::sin: + case Intrinsic::cos: + case Intrinsic::pow: { + MVT RetVT; + if (!isTypeLegal(II->getType(), RetVT)) + return false; + + if (RetVT != MVT::f32 && RetVT != MVT::f64) + return false; + + static const RTLIB::Libcall LibCallTable[3][2] = { + { RTLIB::SIN_F32, RTLIB::SIN_F64 }, + { RTLIB::COS_F32, RTLIB::COS_F64 }, + { RTLIB::POW_F32, RTLIB::POW_F64 } + }; + RTLIB::Libcall LC; + bool Is64Bit = RetVT == MVT::f64; + switch (II->getIntrinsicID()) { + default: + llvm_unreachable("Unexpected intrinsic."); + case Intrinsic::sin: + LC = LibCallTable[0][Is64Bit]; + break; + case Intrinsic::cos: + LC = LibCallTable[1][Is64Bit]; + break; + case Intrinsic::pow: + LC = LibCallTable[2][Is64Bit]; + break; + } + + ArgListTy Args; + Args.reserve(II->getNumArgOperands()); + + // Populate the argument list. + for (auto &Arg : II->arg_operands()) { + ArgListEntry Entry; + Entry.Val = Arg; + Entry.Ty = Arg->getType(); + Args.push_back(Entry); + } + + CallLoweringInfo CLI; + CLI.setCallee(TLI.getLibcallCallingConv(LC), II->getType(), + TLI.getLibcallName(LC), std::move(Args)); + if (!lowerCallTo(CLI)) + return false; + updateValueMap(II, CLI.ResultReg); + return true; + } case Intrinsic::trap: { BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::BRK)) .addImm(1); diff --git a/test/CodeGen/AArch64/fast-isel-frem.ll b/test/CodeGen/AArch64/fast-isel-frem.ll deleted file mode 100644 index 3907fd3003c..00000000000 --- a/test/CodeGen/AArch64/fast-isel-frem.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -code-model=small -verify-machineinstrs < %s | FileCheck %s --check-prefix=SMALL -; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE - -define float @frem_f32(float %a, float %b) { -; SMALL-LABEL: frem_f32 -; SMALL: bl _fmodf -; LARGE-LABEL: frem_f32 -; LARGE: adrp [[REG:x[0-9]+]], _fmodf@GOTPAGE -; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}} -; LARGE-NEXT: blr [[REG]] - %1 = frem float %a, %b - ret float %1 -} - -define double @frem_f64(double %a, double %b) { -; SMALL-LABEL: frem_f64 -; SMALL: bl _fmod -; LARGE-LABEL: frem_f64 -; LARGE: adrp [[REG:x[0-9]+]], _fmod@GOTPAGE -; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}} -; LARGE-NEXT: blr [[REG]] - %1 = frem double %a, %b - ret double %1 -} diff --git a/test/CodeGen/AArch64/fast-isel-runtime-libcall.ll b/test/CodeGen/AArch64/fast-isel-runtime-libcall.ll new file mode 100644 index 00000000000..8d2d39a1a1f --- /dev/null +++ b/test/CodeGen/AArch64/fast-isel-runtime-libcall.ll @@ -0,0 +1,96 @@ +; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -code-model=small -verify-machineinstrs < %s | FileCheck %s --check-prefix=SMALL +; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -code-model=large -verify-machineinstrs < %s | FileCheck %s --check-prefix=LARGE + +define float @frem_f32(float %a, float %b) { +; SMALL-LABEL: frem_f32 +; SMALL: bl _fmodf +; LARGE-LABEL: frem_f32 +; LARGE: adrp [[REG:x[0-9]+]], _fmodf@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmodf@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = frem float %a, %b + ret float %1 +} + +define double @frem_f64(double %a, double %b) { +; SMALL-LABEL: frem_f64 +; SMALL: bl _fmod +; LARGE-LABEL: frem_f64 +; LARGE: adrp [[REG:x[0-9]+]], _fmod@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _fmod@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = frem double %a, %b + ret double %1 +} + +define float @sin_f32(float %a) { +; SMALL-LABEL: sin_f32 +; SMALL: bl _sinf +; LARGE-LABEL: sin_f32 +; LARGE: adrp [[REG:x[0-9]+]], _sinf@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _sinf@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = call float @llvm.sin.f32(float %a) + ret float %1 +} + +define double @sin_f64(double %a) { +; SMALL-LABEL: sin_f64 +; SMALL: bl _sin +; LARGE-LABEL: sin_f64 +; LARGE: adrp [[REG:x[0-9]+]], _sin@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _sin@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = call double @llvm.sin.f64(double %a) + ret double %1 +} + +define float @cos_f32(float %a) { +; SMALL-LABEL: cos_f32 +; SMALL: bl _cosf +; LARGE-LABEL: cos_f32 +; LARGE: adrp [[REG:x[0-9]+]], _cosf@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _cosf@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = call float @llvm.cos.f32(float %a) + ret float %1 +} + +define double @cos_f64(double %a) { +; SMALL-LABEL: cos_f64 +; SMALL: bl _cos +; LARGE-LABEL: cos_f64 +; LARGE: adrp [[REG:x[0-9]+]], _cos@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _cos@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = call double @llvm.cos.f64(double %a) + ret double %1 +} + +define float @pow_f32(float %a, float %b) { +; SMALL-LABEL: pow_f32 +; SMALL: bl _powf +; LARGE-LABEL: pow_f32 +; LARGE: adrp [[REG:x[0-9]+]], _powf@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _powf@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = call float @llvm.pow.f32(float %a, float %b) + ret float %1 +} + +define double @pow_f64(double %a, double %b) { +; SMALL-LABEL: pow_f64 +; SMALL: bl _pow +; LARGE-LABEL: pow_f64 +; LARGE: adrp [[REG:x[0-9]+]], _pow@GOTPAGE +; LARGE: ldr [[REG]], {{\[}}[[REG]], _pow@GOTPAGEOFF{{\]}} +; LARGE-NEXT: blr [[REG]] + %1 = call double @llvm.pow.f64(double %a, double %b) + ret double %1 +} +declare float @llvm.sin.f32(float) +declare double @llvm.sin.f64(double) +declare float @llvm.cos.f32(float) +declare double @llvm.cos.f64(double) +declare float @llvm.pow.f32(float, float) +declare double @llvm.pow.f64(double, double)