Print the s bit if the instruction is toggled to its CPSR setting form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37932 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-07-06 01:01:34 +00:00
parent 04c813d00c
commit dfb2ebac29

View File

@ -102,6 +102,7 @@ namespace {
void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
void printPredicateOperand(const MachineInstr *MI, int opNum);
void printSBitModifierOperand(const MachineInstr *MI, int opNum);
void printPCLabel(const MachineInstr *MI, int opNum);
void printRegisterList(const MachineInstr *MI, int opNum);
void printCPInstOperand(const MachineInstr *MI, int opNum,
@ -621,6 +622,14 @@ void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
O << ARMCondCodeToString(CC);
}
void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
unsigned Reg = MI->getOperand(opNum).getReg();
if (Reg) {
assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
O << 's';
}
}
void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
int Id = (int)MI->getOperand(opNum).getImmedValue();
O << TAI->getPrivateGlobalPrefix() << "PC" << Id;