6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-06-28 06:24:57 +00:00
Code Issues Projects Releases Wiki Activity

[ARM] Use DWARF register numbers for CFI directives in ELF assembly

Browse Source 
It seems gas can't handle CFI directives with VFP register names ("d12", etc.).
This broke us trying to build Chromium for Android after 201423.

A gas bug has been filed: https://sourceware.org/bugzilla/show_bug.cgi?id=16694

compnerd suggested making this conditional on whether we're using the integrated
assembler or not. I'll look into that in a follow-up patch.

Differential Revision: http://llvm-reviews.chandlerc.com/D3049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203635 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hans Wennborg
2014-03-12 03:52:34 +00:00
parent 9d3e746b85
commit e03daa01f6
4 changed files with 148 additions and 145 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
test/CodeGen/ARM/debug-frame-large-stack.ll
View File

@ -42,8 +42,8 @@ define void @test2() {
; CHECK-ARM: .cfi_startproc
; CHECK-ARM: push {r4, r5}
; CHECK-ARM: .cfi_def_cfa_offset 8
; CHECK-ARM: .cfi_offset r5, -4
; CHECK-ARM: .cfi_offset r4, -8
; CHECK-ARM: .cfi_offset 5, -4
; CHECK-ARM: .cfi_offset 4, -8
; CHECK-ARM: sub sp, sp, #72
; CHECK-ARM: sub sp, sp, #4096
; CHECK-ARM: .cfi_def_cfa_offset 4176
@ -54,7 +54,7 @@ define void @test2() {
; CHECK-ARM-FP_ELIM: push {r4, r5}
; CHECK-ARM-FP_ELIM: .cfi_def_cfa_offset 8
; CHECK-ARM-FP_ELIM: .cfi_offset 54, -4
; CHECK-ARM-FP_ELIM: .cfi_offset r4, -8
; CHECK-ARM-FP_ELIM: .cfi_offset 4, -8
; CHECK-ARM-FP_ELIM: sub sp, sp, #72
; CHECK-ARM-FP_ELIM: sub sp, sp, #4096
; CHECK-ARM-FP_ELIM: .cfi_def_cfa_offset 4176
@ -73,11 +73,11 @@ define i32 @test3() {
; CHECK-ARM: .cfi_startproc
; CHECK-ARM: push {r4, r5, r11}
; CHECK-ARM: .cfi_def_cfa_offset 12
; CHECK-ARM: .cfi_offset r11, -4
; CHECK-ARM: .cfi_offset r5, -8
; CHECK-ARM: .cfi_offset r4, -12
; CHECK-ARM: .cfi_offset 11, -4
; CHECK-ARM: .cfi_offset 5, -8
; CHECK-ARM: .cfi_offset 4, -12
; CHECK-ARM: add r11, sp, #8
; CHECK-ARM: .cfi_def_cfa r11, 4
; CHECK-ARM: .cfi_def_cfa 11, 4
; CHECK-ARM: sub sp, sp, #20
; CHECK-ARM: sub sp, sp, #805306368
; CHECK-ARM: bic sp, sp, #15
@ -87,11 +87,11 @@ define i32 @test3() {
; CHECK-ARM-FP-ELIM: .cfi_startproc
; CHECK-ARM-FP-ELIM: push {r4, r5, r11}
; CHECK-ARM-FP-ELIM: .cfi_def_cfa_offset 12
; CHECK-ARM-FP-ELIM: .cfi_offset r11, -4
; CHECK-ARM-FP-ELIM: .cfi_offset r5, -8
; CHECK-ARM-FP-ELIM: .cfi_offset r4, -12
; CHECK-ARM-FP-ELIM: .cfi_offset 11, -4
; CHECK-ARM-FP-ELIM: .cfi_offset 5, -8
; CHECK-ARM-FP-ELIM: .cfi_offset 4, -12
; CHECK-ARM-FP-ELIM: add r11, sp, #8
; CHECK-ARM-FP-ELIM: .cfi_def_cfa r11, 4
; CHECK-ARM-FP-ELIM: .cfi_def_cfa 11, 4
; CHECK-ARM-FP-ELIM: sub sp, sp, #20
; CHECK-ARM-FP-ELIM: sub sp, sp, #805306368
; CHECK-ARM-FP-ELIM: bic sp, sp, #15