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[mips] Fix TAILCALL's operand node type.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166341 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2012-10-19 21:30:15 +00:00
parent a04a4a79ea
commit e050902ca7
1 changed files with 11 additions and 5 deletions
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16
lib/Target/Mips/MipsInstrInfo.td
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@ -598,9 +598,10 @@ class SetCC_I<bits<6> op, string instr_asm, PatFrag cond_op, Operand Od,
IIAlu>; IIAlu>;
// Jump // Jump
class JumpFJ<bits<6> op, string instr_asm, SDPatternOperator operator>: class JumpFJ<bits<6> op, DAGOperand opnd, string instr_asm,
FJ<op, (outs), (ins jmptarget:$target), !strconcat(instr_asm, "\t$target"), SDPatternOperator operator, SDPatternOperator targetoperator>:
[(operator bb:$target)], IIBranch> { FJ<op, (outs), (ins opnd:$target), !strconcat(instr_asm, "\t$target"),
[(operator targetoperator:$target)], IIBranch> {
let isTerminator=1; let isTerminator=1;
let isBarrier=1; let isBarrier=1;
let hasDelaySlot = 1; let hasDelaySlot = 1;
@ -1003,7 +1004,7 @@ def SC_P8 : SCBase<0x38, "sc", CPURegs, mem64>,
} }
/// Jump and Branch Instructions /// Jump and Branch Instructions
def J : JumpFJ<0x02, "j", br>, def J : JumpFJ<0x02, jmptarget, "j", br, bb>,
Requires<[RelocStatic, HasStandardEncoding]>, IsBranch; Requires<[RelocStatic, HasStandardEncoding]>, IsBranch;
def JR : IndirectBranch<CPURegs>; def JR : IndirectBranch<CPURegs>;
def B : UncondBranch<0x04, "b">; def B : UncondBranch<0x04, "b">;
@ -1022,7 +1023,7 @@ def JAL : JumpLink<0x03, "jal">;
def JALR : JumpLinkReg<0x00, 0x09, "jalr", CPURegs>; def JALR : JumpLinkReg<0x00, 0x09, "jalr", CPURegs>;
def BGEZAL : BranchLink<"bgezal", 0x11, CPURegs>; def BGEZAL : BranchLink<"bgezal", 0x11, CPURegs>;
def BLTZAL : BranchLink<"bltzal", 0x10, CPURegs>; def BLTZAL : BranchLink<"bltzal", 0x10, CPURegs>;
def TAILCALL : JumpFJ<0x02, "j", br>, IsTailCall; def TAILCALL : JumpFJ<0x02, calltarget, "j", MipsTailCall, imm>, IsTailCall;
def TAILCALL_R : JumpFR<CPURegs, MipsTailCall>, IsTailCall; def TAILCALL_R : JumpFR<CPURegs, MipsTailCall>, IsTailCall;
def RET : RetBase<CPURegs>; def RET : RetBase<CPURegs>;
@ -1133,6 +1134,11 @@ def : MipsPat<(MipsJmpLink (i32 texternalsym:$dst)),
//def : MipsPat<(MipsJmpLink CPURegs:$dst), //def : MipsPat<(MipsJmpLink CPURegs:$dst),
// (JALR CPURegs:$dst)>; // (JALR CPURegs:$dst)>;
// Tail call
def : MipsPat<(MipsTailCall (iPTR tglobaladdr:$dst)),
(TAILCALL tglobaladdr:$dst)>;
def : MipsPat<(MipsTailCall (iPTR texternalsym:$dst)),
(TAILCALL texternalsym:$dst)>;
// hi/lo relocs // hi/lo relocs
def : MipsPat<(MipsHi tglobaladdr:$in), (LUi tglobaladdr:$in)>; def : MipsPat<(MipsHi tglobaladdr:$in), (LUi tglobaladdr:$in)>;
def : MipsPat<(MipsHi tblockaddress:$in), (LUi tblockaddress:$in)>; def : MipsPat<(MipsHi tblockaddress:$in), (LUi tblockaddress:$in)>;