diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 8e5ca5a4fc4..aa7aff94bf8 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -166,11 +166,15 @@ public:
     bool isImpReg = Op.isRegister() && Op.isImplicit();
     assert((isImpReg || !OperandsComplete()) &&
            "Trying to add an operand to a machine instr that is already done!");
-    if (isImpReg || NumImplicitOps == 0) // This is true most of the time.
+    if (isImpReg || NumImplicitOps == 0) {// This is true most of the time.
       Operands.push_back(Op);
-    else
+      Operands.back().ParentMI = this;
+    } else {
       // Insert a real operand before any implicit ones.
-      Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps, Op);
+      unsigned OpNo = Operands.size()-NumImplicitOps;
+      Operands.insert(Operands.begin()+OpNo, Op);
+      Operands[OpNo].ParentMI = this;
+    }
   }
   
   //===--------------------------------------------------------------------===//
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h
index 49d7245e67f..a092fb45d89 100644
--- a/include/llvm/CodeGen/MachineOperand.h
+++ b/include/llvm/CodeGen/MachineOperand.h
@@ -23,7 +23,8 @@ namespace llvm {
   
 class MachineBasicBlock;
 class GlobalValue;
-
+  class MachineInstr;
+  
 /// MachineOperand class - Representation of each machine instruction operand.
 ///
 class MachineOperand {
@@ -48,6 +49,9 @@ private:
     int64_t immedVal;         // For MO_Immediate and MO_*Index.
   } contents;
 
+  /// ParentMI - This is the instruction that this operand is embedded into.
+  MachineInstr *ParentMI;
+  
   MachineOperandType opType:8; // Discriminate the union.
   bool IsDef : 1;              // True if this is a def, false if this is a use.
   bool IsImp : 1;              // True if this is an implicit def or use.
@@ -69,7 +73,7 @@ private:
     unsigned char subReg;
   } auxInfo;
   
-  MachineOperand() {}
+  MachineOperand() : ParentMI(0) {}
 
   void print(std::ostream &os) const;
   void print(std::ostream *os) const { if (os) print(*os); }
@@ -335,6 +339,7 @@ public:
     IsDead   = MO.IsDead;
     opType   = MO.opType;
     auxInfo  = MO.auxInfo;
+    ParentMI = MO.ParentMI;
     return *this;
   }
 
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 5950c7c09a4..fc55b95addd 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -85,8 +85,10 @@ MachineInstr::MachineInstr(const MachineInstr &MI) {
   Operands.reserve(MI.getNumOperands());
 
   // Add operands
-  for (unsigned i = 0; i != MI.getNumOperands(); ++i)
+  for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
     Operands.push_back(MI.getOperand(i));
+    Operands.back().ParentMI = this;
+  }
 
   // Set parent, next, and prev to null
   parent = 0;
@@ -97,6 +99,10 @@ MachineInstr::MachineInstr(const MachineInstr &MI) {
 
 MachineInstr::~MachineInstr() {
   LeakDetector::removeGarbageObject(this);
+#ifndef NDEBUG
+  for (unsigned i = 0, e = Operands.size(); i != e; ++i)
+    assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
+#endif
 }
 
 /// getOpcode - Returns the opcode of this MachineInstr.