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Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -303,6 +303,8 @@ MipsTargetLowering(MipsTargetMachine &TM)
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setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0);
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setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1);
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maxStoresPerMemcpy = 16;
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}
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bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const {
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@ -3455,6 +3457,16 @@ MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
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return false;
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}
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EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
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unsigned SrcAlign, bool IsZeroVal,
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bool MemcpyStrSrc,
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MachineFunction &MF) const {
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if (Subtarget->hasMips64())
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return MVT::i64;
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return MVT::i32;
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}
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bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
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if (VT != MVT::f32 && VT != MVT::f64)
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return false;
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@ -195,6 +195,11 @@ namespace llvm {
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virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
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virtual EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
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unsigned SrcAlign, bool IsZeroVal,
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bool MemcpyStrSrc,
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MachineFunction &MF) const;
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/// isFPImmLegal - Returns true if the target can instruction select the
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/// specified FP immediate natively. If false, the legalizer will
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/// materialize the FP immediate as a load from a constant pool.
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19
test/CodeGen/Mips/memcpy.ll
Normal file
19
test/CodeGen/Mips/memcpy.ll
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@ -0,0 +1,19 @@
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; RUN: llc -march=mipsel < %s | FileCheck %s
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%struct.S1 = type { i32, [41 x i8] }
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@.str = private unnamed_addr constant [31 x i8] c"abcdefghijklmnopqrstuvwxyzABCD\00", align 1
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define void @foo1(%struct.S1* %s1, i8 signext %n) nounwind {
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entry:
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; CHECK-NOT: call16(memcpy
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%arraydecay = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 0
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %arraydecay, i8* getelementptr inbounds ([31 x i8]* @.str, i32 0, i32 0), i32 31, i32 1, i1 false)
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%arrayidx = getelementptr inbounds %struct.S1* %s1, i32 0, i32 1, i32 40
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store i8 %n, i8* %arrayidx, align 1
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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