Revert r164061-r164067. Most of the new subtarget emitter.

I have to work out the Target/CodeGen header dependencies
before putting this back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164072 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-09-17 23:00:42 +00:00
parent 419e5b9d4f
commit e1b5328717
13 changed files with 64 additions and 356 deletions

View File

@@ -19,28 +19,11 @@ using namespace llvm;
MCSchedModel MCSchedModel::DefaultSchedModel; // For unknown processors.
/// ReInitMCSubtargetInfo - Set or chaing the CPU (optionally supplemented
/// with feature string). Recompute feature bits and scheduling model.
void
MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
SubtargetFeatures Features(FS);
FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
ProcFeatures, NumFeatures);
if (!CPU.empty())
CPUSchedModel = getSchedModelForCPU(CPU);
else
CPUSchedModel = &MCSchedModel::DefaultSchedModel;
}
void
MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
const SubtargetFeatureKV *PF,
const SubtargetFeatureKV *PD,
const SubtargetInfoKV *ProcSched,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA,
const InstrStage *IS,
const unsigned *OC,
const unsigned *FP,
@@ -49,17 +32,25 @@ MCSubtargetInfo::InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS,
ProcFeatures = PF;
ProcDesc = PD;
ProcSchedModels = ProcSched;
WriteProcResTable = WPR;
WriteLatencyTable = WL;
ReadAdvanceTable = RA;
Stages = IS;
OperandCycles = OC;
ForwardingPaths = FP;
NumFeatures = NF;
NumProcs = NP;
InitMCProcessorInfo(CPU, FS);
SubtargetFeatures Features(FS);
FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
ProcFeatures, NumFeatures);
}
/// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
/// feature string) and recompute feature bits.
uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) {
SubtargetFeatures Features(FS);
FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
ProcFeatures, NumFeatures);
return FeatureBits;
}
/// ToggleFeature - Toggle a feature and returns the re-computed feature
@@ -114,5 +105,5 @@ MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
/// Initialize an InstrItineraryData instance.
void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
InstrItins =
InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths);
InstrItineraryData(0, Stages, OperandCycles, ForwardingPaths);
}