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Remove some dead patterns.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127601 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-03-14 18:34:35 +00:00
parent 34661e72fc
commit e2189144d4
4 changed files with 0 additions and 56 deletions
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10
lib/Target/ARM/ARMInstrFormats.td
View File

@ -206,21 +206,11 @@ def setend_op : Operand<i32> {
let PrintMethod = "printSetendOperand";
}
def cps_opt : Operand<i32> {
let PrintMethod = "printCPSOptionOperand";
}
def msr_mask : Operand<i32> {
let PrintMethod = "printMSRMaskOperand";
let ParserMatchClass = MSRMaskOperand;
}
// A8.6.117, A8.6.118. Different instructions are generated for #0 and #-0.
// The neg_zero operand translates -0 to -1, -1 to -2, ..., etc.
def neg_zero : Operand<i32> {
let PrintMethod = "printNegZeroOperand";
}
// Shift Right Immediate - A shift right immediate is encoded differently from
// other shift immediates. The imm6 field is encoded like so:
//

34
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -61,40 +61,6 @@ def t2_so_imm_neg : Operand<i32>,
return ARM_AM::getT2SOImmVal(-((uint32_t)N->getZExtValue())) != -1;
}], t2_so_imm_neg_XFORM>;
// Break t2_so_imm's up into two pieces. This handles immediates with up to 16
// bits set in them. This uses t2_so_imm2part to match and t2_so_imm2part_[12]
// to get the first/second pieces.
def t2_so_imm2part : Operand<i32>,
PatLeaf<(imm), [{
return ARM_AM::isT2SOImmTwoPartVal((unsigned)N->getZExtValue());
}]> {
}
def t2_so_imm2part_1 : SDNodeXForm<imm, [{
unsigned V = ARM_AM::getT2SOImmTwoPartFirst((unsigned)N->getZExtValue());
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
def t2_so_imm2part_2 : SDNodeXForm<imm, [{
unsigned V = ARM_AM::getT2SOImmTwoPartSecond((unsigned)N->getZExtValue());
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
def t2_so_neg_imm2part : Operand<i32>, PatLeaf<(imm), [{
return ARM_AM::isT2SOImmTwoPartVal(-(int)N->getZExtValue());
}]> {
}
def t2_so_neg_imm2part_1 : SDNodeXForm<imm, [{
unsigned V = ARM_AM::getT2SOImmTwoPartFirst(-(int)N->getZExtValue());
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
def t2_so_neg_imm2part_2 : SDNodeXForm<imm, [{
unsigned V = ARM_AM::getT2SOImmTwoPartSecond(-(int)N->getZExtValue());
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
/// imm1_31 predicate - True if the 32-bit immediate is in the range [1,31].
def imm1_31 : PatLeaf<(i32 imm), [{
return (int32_t)N->getZExtValue() >= 1 && (int32_t)N->getZExtValue() < 32;

10
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
View File

@ -417,16 +417,6 @@ void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum,
}
}
void ARMInstPrinter::printNegZeroOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNum);
O << '#';
if (Op.getImm() < 0)
O << '-' << (-Op.getImm() - 1);
else
O << Op.getImm();
}
void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O) {
ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();

2
lib/Target/ARM/InstPrinter/ARMInstPrinter.h
View File

@ -88,9 +88,7 @@ public:
void printSetendOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printCPSIMod(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printCPSIFlag(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printCPSOptionOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printMSRMaskOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printNegZeroOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
void printMandatoryPredicateOperand(const MCInst *MI, unsigned OpNum,
raw_ostream &O);