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Add operand constraints to TargetInstrInfo.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31333 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2006-11-01 00:27:05 +00:00
parent 2f15c063ba
commit e2ba897588
6 changed files with 110 additions and 16 deletions
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21
include/llvm/Target/TargetInstrInfo.h
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@@ -94,6 +94,9 @@ public:
/// if the operand is a register. If not, this contains 0.
unsigned short RegClass;
unsigned short Flags;
/// Lower 16 bits are used to specify which constraints are set. The higher 16
/// bits are used to specify the value of constraints (4 bits each).
unsigned int Constraints;
/// Currently no other information.
};
@@ -219,6 +222,24 @@ public:
return get(Opcode).Flags & M_VARIABLE_OPS;
}
// Operand constraints: only "tied_to" for now.
enum OperandConstraint {
TIED_TO = 0 // Must be allocated the same register as.
};
/// getOperandConstraint - Returns the value of the specific constraint if
/// it is set. Returns -1 if it is not set.
int getOperandConstraint(MachineOpCode Opcode, unsigned OpNum,
OperandConstraint Constraint) {
assert(OpNum < get(Opcode).numOperands &&
"Invalid operand # of TargetInstrInfo");
if (get(Opcode).OpInfo[OpNum].Constraints & (1 << Constraint)) {
unsigned Pos = 16 + Constraint * 4;
return (int)(get(Opcode).OpInfo[OpNum].Constraints >> Pos) & 0xf;
}
return -1;
}
/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
/// instruction if it has one. This is used by codegen passes that update
/// DWARF line number info as they modify the code.