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Mark avx2 maskstore has ReadWriteArgMem. Mark broadcast and maskload as ReadArgMem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162649 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1270,19 +1270,19 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx_vbroadcast_ss :
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GCCBuiltin<"__builtin_ia32_vbroadcastss">,
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Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
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def int_x86_avx_vbroadcast_sd_256 :
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GCCBuiltin<"__builtin_ia32_vbroadcastsd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
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def int_x86_avx_vbroadcast_ss_256 :
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GCCBuiltin<"__builtin_ia32_vbroadcastss256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
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def int_x86_avx_vbroadcastf128_pd_256 :
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GCCBuiltin<"__builtin_ia32_vbroadcastf128_pd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
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def int_x86_avx_vbroadcastf128_ps_256 :
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GCCBuiltin<"__builtin_ia32_vbroadcastf128_ps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
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}
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// SIMD load ops
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@ -1304,13 +1304,17 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// Conditional load ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx_maskload_pd : GCCBuiltin<"__builtin_ia32_maskloadpd">,
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Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty, llvm_v2f64_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v2f64_ty], [llvm_ptr_ty, llvm_v2f64_ty],
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[IntrReadArgMem]>;
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def int_x86_avx_maskload_ps : GCCBuiltin<"__builtin_ia32_maskloadps">,
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Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty, llvm_v4f32_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4f32_ty], [llvm_ptr_ty, llvm_v4f32_ty],
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[IntrReadArgMem]>;
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def int_x86_avx_maskload_pd_256 : GCCBuiltin<"__builtin_ia32_maskloadpd256">,
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty, llvm_v4f64_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4f64_ty], [llvm_ptr_ty, llvm_v4f64_ty],
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[IntrReadArgMem]>;
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def int_x86_avx_maskload_ps_256 : GCCBuiltin<"__builtin_ia32_maskloadps256">,
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8f32_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v8f32_ty], [llvm_ptr_ty, llvm_v8f32_ty],
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[IntrReadArgMem]>;
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}
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// Conditional store ops
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@ -1632,7 +1636,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_v8f32_ty], [llvm_v4f32_ty], [IntrNoMem]>;
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def int_x86_avx2_vbroadcasti128 :
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GCCBuiltin<"__builtin_ia32_vbroadcastsi256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadArgMem]>;
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def int_x86_avx2_pbroadcastb_128 :
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GCCBuiltin<"__builtin_ia32_pbroadcastb128">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem]>;
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@ -1685,27 +1689,35 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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// Conditional load ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_maskload_d : GCCBuiltin<"__builtin_ia32_maskloadd">,
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Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_v4i32_ty],
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[IntrReadArgMem]>;
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def int_x86_avx2_maskload_q : GCCBuiltin<"__builtin_ia32_maskloadq">,
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Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_v2i64_ty],
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[IntrReadArgMem]>;
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def int_x86_avx2_maskload_d_256 : GCCBuiltin<"__builtin_ia32_maskloadd256">,
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Intrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_v8i32_ty],
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[IntrReadArgMem]>;
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def int_x86_avx2_maskload_q_256 : GCCBuiltin<"__builtin_ia32_maskloadq256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_v4i64_ty],
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[IntrReadArgMem]>;
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}
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// Conditional store ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx2_maskstore_d : GCCBuiltin<"__builtin_ia32_maskstored">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i32_ty], []>;
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Intrinsic<[], [llvm_ptr_ty, llvm_v4i32_ty, llvm_v4i32_ty],
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[IntrReadWriteArgMem]>;
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def int_x86_avx2_maskstore_q : GCCBuiltin<"__builtin_ia32_maskstoreq">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i64_ty], []>;
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Intrinsic<[], [llvm_ptr_ty, llvm_v2i64_ty, llvm_v2i64_ty],
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[IntrReadWriteArgMem]>;
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def int_x86_avx2_maskstore_d_256 :
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GCCBuiltin<"__builtin_ia32_maskstored256">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i32_ty], []>;
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Intrinsic<[], [llvm_ptr_ty, llvm_v8i32_ty, llvm_v8i32_ty],
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[IntrReadWriteArgMem]>;
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def int_x86_avx2_maskstore_q_256 :
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GCCBuiltin<"__builtin_ia32_maskstoreq256">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i64_ty], []>;
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Intrinsic<[], [llvm_ptr_ty, llvm_v4i64_ty, llvm_v4i64_ty],
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[IntrReadWriteArgMem]>;
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}
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// Variable bit shift ops
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