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This test may have been sensitive to the ARM ABI...

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187442 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2013-07-30 20:34:59 +00:00
parent f4ab63f3d8
commit e4049f66a4
1 changed files with 1 additions and 1 deletions
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test/CodeGen/ARM/misched-copy-arm.ll
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@ -33,7 +33,7 @@ for.end: ; preds = %for.body, %entry
; This case was a crasher in constrainLocalCopy. ; This case was a crasher in constrainLocalCopy.
; The problem was the t2LDR_PRE defining both the global and local lrg. ; The problem was the t2LDR_PRE defining both the global and local lrg.
; CHECK-LABEL: *** Final schedule for BB#5 *** ; CHECK-LABEL: *** Final schedule for BB#5 ***
; CHECK: %[[R4:vreg[0-9]+]]<def>, %[[R1:vreg[0-9]+]]<def,tied2> = t2LDR_PRE %[[R1]]<tied1>, 4 ; CHECK: %[[R4:vreg[0-9]+]]<def>, %[[R1:vreg[0-9]+]]<def,tied2> = t2LDR_PRE %[[R1]]<tied1>
; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R1]] ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R1]]
; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R4]] ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R4]]
; CHECK-LABEL: MACHINEINSTRS ; CHECK-LABEL: MACHINEINSTRS