6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-09 01:38:03 +00:00
Code Issues Projects Releases Wiki Activity

WebAssembly: handle more than int32 argument/return

Browse Source 
Summary: Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them.

Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243822 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
JF Bastien 2015-08-01 04:48:44 +00:00
parent 14ec817aea
commit e428ba798e
8 changed files with 222 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
View File

@ -92,10 +92,23 @@ void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
bool PrintOperands = true;
switch (MI->getOpcode()) {
case WebAssembly::ARGUMENT:
case WebAssembly::ARGUMENT_Int32:
case WebAssembly::ARGUMENT_Int64:
case WebAssembly::ARGUMENT_Float32:
case WebAssembly::ARGUMENT_Float64:
OS << "argument " << MI->getOperand(1).getImm();
PrintOperands = false;
break;
case WebAssembly::RETURN_Int32:
case WebAssembly::RETURN_Int64:
case WebAssembly::RETURN_Float32:
case WebAssembly::RETURN_Float64:
case WebAssembly::RETURN_VOID:
// FIXME This is here only so "return" prints nicely, instead of printing
// the isel name. Other operations have the same problem, fix this in
// a generic way instead.
OS << "return";
break;
default:
OS << TII->getName(MI->getOpcode());
break;

2
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
View File

@ -188,8 +188,6 @@ SDValue WebAssemblyTargetLowering::LowerFormalArguments(
fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
if (In.Flags.isSplit())
fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
if (In.VT != MVT::i32)
fail(DL, DAG, "WebAssembly hasn't implemented non-i32 arguments");
// FIXME Do something with In.getOrigAlign()?
InVals.push_back(
In.Used

11
lib/Target/WebAssembly/WebAssemblyInstrControl.td
View File

@ -25,10 +25,15 @@
* switch: switch statement with fallthrough
*/
multiclass RETURN<WebAssemblyRegClass vt> {
def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)]>;
}
let hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
isBarrier = 1 in {
//FIXME return more than just int32.
def RETURN : I<(outs), (ins Int32:$val), [(WebAssemblyreturn Int32:$val)]>;
def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
defm : RETURN<Int32>;
defm : RETURN<Int64>;
defm : RETURN<Float32>;
defm : RETURN<Float64>;
def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
} // hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
// isBarrier = 1

10
lib/Target/WebAssembly/WebAssemblyInstrInfo.td
View File

@ -55,8 +55,14 @@ def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN",
include "WebAssemblyInstrFormats.td"
def ARGUMENT : I<(outs Int32:$res), (ins i32imm:$argno),
[(set Int32:$res, (WebAssemblyargument timm:$argno))]>;
multiclass ARGUMENT<WebAssemblyRegClass vt> {
def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
[(set vt:$res, (WebAssemblyargument timm:$argno))]>;
}
defm : ARGUMENT<Int32>;
defm : ARGUMENT<Int64>;
defm : ARGUMENT<Float32>;
defm : ARGUMENT<Float64>;
//===----------------------------------------------------------------------===//
// Additional sets of instructions.

34
test/CodeGen/WebAssembly/integer.ll → test/CodeGen/WebAssembly/integer32.ll
View File

@ -1,5 +1,7 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that basic 32-bit integer operations assemble as expected.
target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
target triple = "wasm32-unknown-unknown"
@ -11,7 +13,7 @@ declare i32 @llvm.ctpop.i32(i32)
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (ADD_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @add32(i32 %x, i32 %y) {
%a = add i32 %x, %y
ret i32 %a
@ -21,7 +23,7 @@ define i32 @add32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SUB_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @sub32(i32 %x, i32 %y) {
%a = sub i32 %x, %y
ret i32 %a
@ -31,7 +33,7 @@ define i32 @sub32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (MUL_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @mul32(i32 %x, i32 %y) {
%a = mul i32 %x, %y
ret i32 %a
@ -41,7 +43,7 @@ define i32 @mul32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SDIV_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @sdiv32(i32 %x, i32 %y) {
%a = sdiv i32 %x, %y
ret i32 %a
@ -51,7 +53,7 @@ define i32 @sdiv32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (UDIV_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @udiv32(i32 %x, i32 %y) {
%a = udiv i32 %x, %y
ret i32 %a
@ -61,7 +63,7 @@ define i32 @udiv32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SREM_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @srem32(i32 %x, i32 %y) {
%a = srem i32 %x, %y
ret i32 %a
@ -71,7 +73,7 @@ define i32 @srem32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (UREM_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @urem32(i32 %x, i32 %y) {
%a = urem i32 %x, %y
ret i32 %a
@ -81,7 +83,7 @@ define i32 @urem32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (AND_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @and32(i32 %x, i32 %y) {
%a = and i32 %x, %y
ret i32 %a
@ -91,7 +93,7 @@ define i32 @and32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (IOR_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @ior32(i32 %x, i32 %y) {
%a = or i32 %x, %y
ret i32 %a
@ -101,7 +103,7 @@ define i32 @ior32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (XOR_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @xor32(i32 %x, i32 %y) {
%a = xor i32 %x, %y
ret i32 %a
@ -111,7 +113,7 @@ define i32 @xor32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SHL_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @shl32(i32 %x, i32 %y) {
%a = shl i32 %x, %y
ret i32 %a
@ -121,7 +123,7 @@ define i32 @shl32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SHR_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @shr32(i32 %x, i32 %y) {
%a = lshr i32 %x, %y
ret i32 %a
@ -131,7 +133,7 @@ define i32 @shr32(i32 %x, i32 %y) {
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SAR_I32 @1 @0))
; CHECK-NEXT: (RETURN @2)
; CHECK-NEXT: (return @2)
define i32 @sar32(i32 %x, i32 %y) {
%a = ashr i32 %x, %y
ret i32 %a
@ -140,7 +142,7 @@ define i32 @sar32(i32 %x, i32 %y) {
; CHECK-LABEL: clz32:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (setlocal @1 (CLZ_I32 @0))
; CHECK-NEXT: (RETURN @1)
; CHECK-NEXT: (return @1)
define i32 @clz32(i32 %x) {
%a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
ret i32 %a
@ -149,7 +151,7 @@ define i32 @clz32(i32 %x) {
; CHECK-LABEL: ctz32:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (setlocal @1 (CTZ_I32 @0))
; CHECK-NEXT: (RETURN @1)
; CHECK-NEXT: (return @1)
define i32 @ctz32(i32 %x) {
%a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
ret i32 %a
@ -158,7 +160,7 @@ define i32 @ctz32(i32 %x) {
; CHECK-LABEL: popcnt32:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (setlocal @1 (POPCNT_I32 @0))
; CHECK-NEXT: (RETURN @1)
; CHECK-NEXT: (return @1)
define i32 @popcnt32(i32 %x) {
%a = call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %a

171
test/CodeGen/WebAssembly/integer64.ll Normal file
View File

@ -0,0 +1,171 @@
; RUN: llc < %s -asm-verbose=false | FileCheck %s
; Test that basic 64-bit integer operations assemble as expected.
target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
target triple = "wasm32-unknown-unknown"
declare i64 @llvm.ctlz.i64(i64, i1)
declare i64 @llvm.cttz.i64(i64, i1)
declare i64 @llvm.ctpop.i64(i64)
; CHECK-LABEL: add64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (ADD_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @add64(i64 %x, i64 %y) {
%a = add i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: sub64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SUB_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @sub64(i64 %x, i64 %y) {
%a = sub i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: mul64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (MUL_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @mul64(i64 %x, i64 %y) {
%a = mul i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: sdiv64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SDIV_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @sdiv64(i64 %x, i64 %y) {
%a = sdiv i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: udiv64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (UDIV_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @udiv64(i64 %x, i64 %y) {
%a = udiv i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: srem64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (SREM_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @srem64(i64 %x, i64 %y) {
%a = srem i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: urem64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (UREM_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @urem64(i64 %x, i64 %y) {
%a = urem i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: and64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (AND_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @and64(i64 %x, i64 %y) {
%a = and i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: ior64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (IOR_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @ior64(i64 %x, i64 %y) {
%a = or i64 %x, %y
ret i64 %a
}
; CHECK-LABEL: xor64:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (setlocal @1 (argument 0))
; CHECK-NEXT: (setlocal @2 (XOR_I64 @1 @0))
; CHECK-NEXT: (return @2)
define i64 @xor64(i64 %x, i64 %y) {
%a = xor i64 %x, %y
ret i64 %a
}
; FIXME: 64-bit shifts have an extra truncate of the input shift value, which
; WebAssembly hasn't taught isel to match yet. Fix with
; getScalarShiftAmountTy.
; C;HECK-LABEL: shl64:
; C;HECK-NEXT: (setlocal @0 (argument 1))
; C;HECK-NEXT: (setlocal @1 (argument 0))
; C;HECK-NEXT: (setlocal @2 (SHL_I64 @1 @0))
; C;HECK-NEXT: (return @2)
;define i64 @shl64(i64 %x, i64 %y) {
; %a = shl i64 %x, %y
; ret i64 %a
;}
; C;HECK-LABEL: shr64:
; C;HECK-NEXT: (setlocal @0 (argument 1))
; C;HECK-NEXT: (setlocal @1 (argument 0))
; C;HECK-NEXT: (setlocal @2 (SHR_I64 @1 @0))
; C;HECK-NEXT: (return @2)
;define i64 @shr64(i64 %x, i64 %y) {
; %a = lshr i64 %x, %y
; ret i64 %a
;}
; C;HECK-LABEL: sar64:
; C;HECK-NEXT: (setlocal @0 (argument 1))
; C;HECK-NEXT: (setlocal @1 (argument 0))
; C;HECK-NEXT: (setlocal @2 (SAR_I64 @1 @0))
; C;HECK-NEXT: (return @2)
;define i64 @sar64(i64 %x, i64 %y) {
; %a = ashr i64 %x, %y
; ret i64 %a
;}
; CHECK-LABEL: clz64:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (setlocal @1 (CLZ_I64 @0))
; CHECK-NEXT: (return @1)
define i64 @clz64(i64 %x) {
%a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
ret i64 %a
}
; CHECK-LABEL: ctz64:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (setlocal @1 (CTZ_I64 @0))
; CHECK-NEXT: (return @1)
define i64 @ctz64(i64 %x) {
%a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
ret i64 %a
}
; CHECK-LABEL: popcnt64:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (setlocal @1 (POPCNT_I64 @0))
; CHECK-NEXT: (return @1)
define i64 @popcnt64(i64 %x) {
%a = call i64 @llvm.ctpop.i64(i64 %x)
ret i64 %a
}

2
test/CodeGen/WebAssembly/return-void.ll
View File

@ -4,7 +4,7 @@ target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: return_void:
; CHECK-NEXT: (RETURN_VOID)
; CHECK-NEXT: (return)
define void @return_void() {
ret void
}

4
test/CodeGen/WebAssembly/unused-argument.ll
View File

@ -7,14 +7,14 @@ target triple = "wasm32-unknown-unknown"
; CHECK-LABEL: unused_first:
; CHECK-NEXT: (setlocal @0 (argument 1))
; CHECK-NEXT: (RETURN @0)
; CHECK-NEXT: (return @0)
define i32 @unused_first(i32 %x, i32 %y) {
ret i32 %y
}
; CHECK-LABEL: unused_second:
; CHECK-NEXT: (setlocal @0 (argument 0))
; CHECK-NEXT: (RETURN @0)
; CHECK-NEXT: (return @0)
define i32 @unused_second(i32 %x, i32 %y) {
ret i32 %x
}